SiC Epitaxial Wafer Growth with Wafer Pairs and Gas Pressure Control
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Solution Overview
Problem
The challenges in fabricating high-quality SiC epitaxial wafers include the high cost of polishing processes for bonding single-crystal SiC substrates, defects at the bonding interface, and the difficulty of growing uniform SiC layers at low cost, particularly due to graphene etching during high-temperature epitaxial growth.
Innovation Solution
A fabricating apparatus and method involving a vertical-structured double-tube furnace hot-wall type LP-CVD apparatus, where SiC wafer pairs are heated in a growth furnace with a gas mixing preliminary chamber to regulate carrier and material gases, allowing for epitaxial growth on both substrates simultaneously, reducing the need for expensive substrate bonding and minimizing graphene etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If single-crystal SiC substrates are bonded together, then high-quality epitaxial wafers can be produced, but the polishing process becomes expensive and defects appear at the bonding interface
Solution Approach 1:
The patent divides the substrate into multiple single-crystal SiC substrates that are processed separately and then bonded together. Each substrate is independently polished and epitaxially grown, avoiding the need to polish a large bonded interface. The segmentation allows for simpler, less expensive polishing processes on individual substrates while maintaining high epitaxial wafer quality.
Solution Approach 2:
The patent performs preliminary polishing and epitaxial growth on individual single-crystal SiC substrates before bonding them together. By completing the critical polishing and growth steps on separate substrates beforehand, the bonding process itself becomes simpler and less prone to defects, resolving the contradiction between manufacturing precision and ease of manufacture.
2Reliability
If graphene layer is present during high-temperature epitaxial growth, then substrate protection is achieved, but graphene etching occurs and degrades quality
Solution Approach 1:
The patent removes the graphene layer before performing high-temperature epitaxial growth. By extracting the graphene layer that causes etching problems, the patent eliminates the harmful effect while maintaining substrate protection through alternative means during the epitaxial process, thus achieving both substrate protection and epitaxial layer uniformity.
Solution Approach 2:
The patent performs preliminary steps to remove or protect against graphene etching before the main epitaxial growth process. This preliminary action prevents the degradation of epitaxial layer uniformity while still allowing substrate protection to be maintained through controlled processing conditions.
3Productivity
If multiple substrates are processed simultaneously, then productivity increases, but uniform crystal growth becomes difficult to control
Solution Approach 1:
The patent processes multiple single-crystal SiC substrates separately through the epitaxial growth stage, ensuring uniform crystal growth on each substrate. After individual substrates are successfully grown, they are then bonded together in a subsequent step. This segmentation maintains manufacturing precision while achieving high productivity through parallel processing of identical, controlled units.
Solution Approach 2:
The patent maintains consistent processing parameters for each substrate during epitaxial growth, ensuring uniform crystal growth across multiple substrates. By carefully controlling temperature, pressure, and gas flow parameters for each substrate individually, the patent achieves both high productivity and manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the production of high-quality SiC epitaxial wafers with reduced costs by eliminating the need for costly substrate bonding and minimizing graphene etching, while ensuring uniform crystal growth across multiple substrates.
Implementation Method 1
a heating unit configured to heat the wafer boat disposed in the growth furnace to an epitaxial growth temperature
Implementation Method 2
a vertical-structured double-tube furnace hot-wall type LP-CVD apparatus
Data Source
AI summary
A fabricating apparatus (2) of an sic epitaxial wafer disclosed herein includes: a growth furnace (100A); a gas mixing preliminary chamber (107) disposed outside the growth furnace and configured to mix carrier gas and/or material gas and to regulate a pressure thereof; a wafer boat (210) configured so that a plurality of SiC wafer pairs (200WP), in which two substrates each having an SiC single crystal in contact with each other in a back-to-back manner, are disposed at equal intervals with a gap therebetween; and a heating unit (101) configured to heat the wafer boat disposed in the growth furnace to an epitaxial growth temperature. The carrier gas and/or the material gas are introduced into the growth furnace after preliminarily being mixed and pressure-regulated in the gas mixing preliminary chamber (107) to grow an SiC layer on a surface of each of the plurality of SiC wafer pairs.