SiC Wafer Defect Removal via Protrusion Epitaxy
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Solution Overview
Problem
The manufacturing of large-size semiconductor wafers with SiC substrates is hindered by surface roughness caused by threading screw dislocations, which are introduced during crystal growth with a temperature gradient, leading to reduced yield and performance.
Innovation Solution
A method involving the formation of protrusions on the SiC substrate, followed by metastable solvent epitaxy to grow epitaxial layers, where threading screw dislocations are selectively grown and removed, allowing subsequent layers to connect at a molecular level, thereby creating a large-area monocrystalline semiconductor wafer with few crystal defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If mechanical polishing is used to planarize the SiC substrate surface, then the surface flatness is improved, but polishing flaws are generated in the submicron order
Solution Approach 1:
The harmful polishing flaws are selectively removed through chemical-mechanical polishing, which extracts and eliminates the submicron-order defects while preserving the overall surface flatness achieved by mechanical polishing
Solution Approach 2:
The polishing process parameters are changed from purely mechanical to chemical-mechanical, introducing chemical components that enable selective removal of polishing flaws without compromising surface flatness
2Ease of manufacture
If a temperature gradient is applied during crystal growth, then the crystal growth process is enabled, but threading screw dislocations are introduced causing surface roughness
Solution Approach 1:
The threading screw dislocations that cause surface roughness are selectively epitaxially grown into protrusions, converting the harmful dislocations into distinguishable features that can be identified and removed, thereby transforming a manufacturing defect into a controllable process feature
Solution Approach 2:
The dislocations are preliminarily grown into protrusions before the final wafer fabrication, enabling their identification and removal in advance, so that the surface roughness problem is solved before the semiconductor elements are manufactured
3Area of stationary object
If the semiconductor wafer size is increased, then the performance and application range are improved, but the likelihood of partial surface roughness increases
Solution Approach 1:
The protrusions containing threading screw dislocations are selectively removed from the large-area wafer surface, extracting the sources of surface roughness while preserving the majority of the large wafer area, thereby enabling production of large-size wafers with uniform surface quality
Solution Approach 2:
The removal process targets only the local regions containing protrusions with dislocations, applying selective treatment to specific defective areas while leaving the rest of the large wafer surface intact, thus maintaining overall surface uniformity across the large area
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the production of large-area semiconductor wafers with reduced crystal defects, improving the surface smoothness and yield by distinguishing and removing threading screw dislocations, thus enhancing the performance and reliability of semiconductor wafers.
Implementation Method 1
the SiC substrate is heated under Si vapor pressure, so that the SiC substrate is etched
Implementation Method 2
monocrystalline SiC can be epitaxially grown on a surface of the seed substrate
Implementation Method 3
Metastable Solvent Epitaxy (MSE) process which is a sort of solution growth technique
Implementation Method 4
heating is performed so that the protrusions of the SiC substrate are epitaxially grown
Implementation Method 5
at least a part of the epitaxial layer containing threading screw dislocation is removed
Data Source
Figure 1
Figure 2(a)~2(b)
Figure 3(a)~3(b)
AI summary
In a first step, protrusions (42) are formed on a surface of an SiC substrate (40), and the SiC substrate (40) is etched. In a second step, the protrusions (42) of the SiC substrate (40) are epitaxially grown through MSE process, and an epitaxial layer (43a) containing threading screw dislocation, which has been largely grown in the vertical (c-axis) direction as a result of MSE process, is at least partially removed. In a third step, MSE process is performed again on the SiC substrate (40) after the second step, to cause epitaxial layers (43) containing no threading screw dislocation to be grown in the horizontal (a-axis) direction to be connected at the molecular level, so that one monocrystalline 4H-SiC semiconductor wafer (45) having a large area is generated throughout an Si-face or a C-face of the SiC substrate (40).