SiC Wafer Depth Measurement via Resistance Evaluation Elements
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Solution Overview
Problem
Existing methods for measuring the depth of removal of a silicon carbide (SiC) wafer are inaccurate, especially for thin layers, due to direct scanning by measurement probes, which are affected by variations in the thickness of the interlayer insulating film, making it difficult to regulate the threshold voltage of MOS-FETs effectively.
Innovation Solution
A semiconductor device with evaluation elements disposed on the SiC wafer, featuring a doped region and a partially covering insulating film, allowing for resistance measurement to estimate the depth of removal, independent of the insulating film thickness, using a method that includes doping, forming insulating films, partial etching, and resistance measurement to adjust processing conditions for precise depth control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a step measuring instrument directly scans the SiC wafer surface to measure depth of removal, then the measurement process is simple, but the measurement precision deteriorates for thin layers due to probe contact effects and insulating film thickness variations
Solution Approach 1:
The patent introduces an intermediary measurement method using electrical resistance instead of direct mechanical probing. By measuring the resistance between two doped regions through the SiC wafer, the system indirectly determines depth of removal without the probe physically contacting and disturbing the measurement surface, thereby eliminating the trade-off between simplicity and precision
Solution Approach 2:
The patent replaces the mechanical scanning probe system with an electrical measurement system. Instead of using a physical probe to mechanically scan and measure the SiC wafer surface depth, the system uses electrical resistance measurements through doped regions to determine depth of removal, achieving high precision without mechanical contact issues
2Measurement precision
If additional process steps are added to etch oxide film around patterns for separate insulating film thickness measurement, then the measurement precision of insulating film thickness improves, but the device complexity and manufacturing time increase
Solution Approach 1:
The patent merges the depth of removal measurement and insulating film thickness measurement into a single integrated process. By forming doped regions before the insulating film and measuring resistance through both layers, the system simultaneously obtains both measurement data without requiring separate etching processes or additional measurement steps
Solution Approach 2:
The resistance measurement structure serves multiple functions: it measures both the depth of removal of the SiC wafer and the thickness of the insulating film, as well as providing evaluation of the MOS-FET threshold voltage. This multi-functional approach eliminates the need for separate measurement processes
3Manufacturing precision
If the depth of removal of SiC wafer varies, then the threshold voltage of MOS-FET changes, but controlling the depth precision becomes difficult due to measurement inaccuracies
Solution Approach 1:
The patent implements a feedback control system where the resistance measurement results are used to adjust and optimize the depth of removal in subsequent processing steps. By measuring the actual depth through resistance and comparing it with target values, the system can adjust etching parameters to achieve precise threshold voltage control in MOS-FETs
Solution Approach 2:
The patent performs preliminary doping of the SiC wafer to create measurement structures before the main processing steps. These pre-formed doped regions enable accurate depth measurement through resistance, allowing the system to predict and control the final threshold voltage outcome before completing all processing steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables high-accuracy measurement and control of the depth of removal of the SiC wafer, reducing variations in the electrical properties of MOS-FETs and improving the accuracy of threshold voltage regulation.
Implementation Method 1
enables a resistance of the evaluation element to be measured
Implementation Method 2
an insulating film partially covering the doped region
Data Source
AI summary
Provided is a semiconductor device capable of measuring a depth of removal of a silicon carbide (SiC) wafer with high accuracy through simple steps, and a method for producing the semiconductor device. The semiconductor device according to an aspect of the present invention includes at least one evaluation element disposed on a SiC wafer. The evaluation element includes a doped region doped with a dopant on the SiC wafer, and an insulating film partially covering the doped region. The insulating film includes a plurality of partial insulating films. The doped region includes a plurality of regions sectioned by the plurality of partial insulating films in a plan view.