Silicon Carbide Wafer Resistivity via Intrinsic Vacancy Control
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Solution Overview
Problem
Current methods for producing high-purity, large-size silicon carbide wafers face challenges in achieving uniform resistivity and yield, particularly for crystals larger than 4 inches, due to difficulties in controlling production conditions and the need for additional annealing or neutron bombardment processes.
Innovation Solution
The method involves controlling the Si/C ratio and particle size distribution of high-purity crystal growth raw materials in a carbon-rich environment during the physical vapor transport process, generating intrinsic silicon vacancies to increase resistivity and eliminate the need for additional processing steps, resulting in high-purity semi-insulating single-crystal silicon carbide wafers with silicon-vacancy concentrations greater than 5E11 cm^-3.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional annealing or neutron bombardment processes are used to achieve high resistivity, then resistivity is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent applies preliminary action by generating the required silicon vacancies directly during the crystal growth process through controlled carbon-rich conditions and specific Si/C ratios, rather than requiring subsequent annealing or neutron bombardment steps. This preliminary creation of intrinsic defects eliminates the need for additional complex processing steps while achieving the desired high resistivity characteristic.
2Productivity
If crystal size is increased to produce larger wafers, then productivity is improved, but manufacturing precision and yield deteriorate
Solution Approach 1:
The patent applies local quality by creating a carbon-rich environment specifically in the crystal growth zone and controlling the Si/C ratio locally during growth. This localized control of chemical conditions ensures uniform generation of silicon vacancies throughout the large crystal, achieving consistent high resistivity across the entire wafer surface even for 6-inch and larger sizes.
Solution Approach 2:
The patent applies parameter changes by modifying the Si/C ratio and creating carbon-rich conditions during crystal growth to control the concentration of intrinsic silicon vacancies. By adjusting these growth parameters, the method achieves uniform high resistivity across large-area wafers without the defects that typically plague larger crystal production.
3Reliability
If vanadium doping and reactive gas annealing are used to achieve high resistivity, then resistivity is improved, but manufacturing precision and defect control worsen
Solution Approach 1:
The patent applies self-service by enabling the crystal growth process itself to generate the required silicon vacancies through controlled carbon-rich conditions and specific Si/C ratios. This self-generation of intrinsic defects during growth eliminates the need for external doping with vanadium or subsequent reactive gas annealing treatments, thereby avoiding the defects and non-uniformities associated with those methods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process by eliminating the need for additional processing steps and achieves high-resistivity, low-defect silicon carbide wafers with improved yield and uniformity, suitable for large-size wafers up to 6 inches in diameter.
Implementation Method 1
Physical vapor transport (PVT) is currently the mainstream method for the commercial mass production of silicon carbide crystal
Implementation Method 2
sublimating the carbide material from solid to gas molecules
Data Source
AI summary
The present disclosure provides high-purity semi-insulating single-crystal silicon carbide wafer and crystal which include one polytype single crystal. The semi-insulating single-crystal silicon carbide wafer has silicon vacancy inside, wherein the silicon-vacancy concentration is greater than 5E11 cm{circumflex over ( )}-3.