Anomaly Detection Framework for Side Channel Attacks
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Solution Overview
Problem
Current methods for mitigating side channel attacks, such as Meltdown and Spectre, are inadequate as they focus on patching and new architecture designs, which are not universally applicable and can introduce operational overhead, and there is a need for early detection to prevent data exposure.
Innovation Solution
A lightweight anomaly detection framework using machine learning with stacked gated recurrent units (GRUs) for analyzing Hardware Performance Counter (HPC) data to detect cache side channel attacks, allowing for responsive actions without relying on attack data for training, thus being generalizable to new attacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If patching and new architecture designs are used to mitigate side channel attacks, then security against attacks is improved, but operational overhead increases and applicability is limited
Solution Approach 1:
The system performs preliminary action by collecting and analyzing hardware performance counter data to detect side channel attacks before they can compromise sensitive information. The anomaly detection model is trained in advance on benign workload data to establish a baseline of normal behavior, enabling early detection of malicious activities without requiring reactive patching or architectural changes.
Solution Approach 2:
The system introduces an intermediary anomaly detection framework that sits between the hardware and the attacked applications. This framework uses hardware performance counters as intermediaries to indirectly observe and detect attack patterns, avoiding the need to modify the underlying hardware architecture or application code while still providing security protection.
2Loss of time
If hardware performance counters are monitored and analyzed using machine learning, then early detection capability is improved, but computational resources are consumed
Solution Approach 1:
The system extracts only the essential features from hardware performance counter data that are most indicative of side channel attacks. By selecting and monitoring specific counters (such as cache-related counters) rather than analyzing all possible hardware metrics, the system reduces computational overhead while maintaining effective detection capability.
Solution Approach 2:
The system applies partial action by focusing machine learning analysis only on the most relevant hardware performance counter metrics for detecting side channel attacks. Rather than processing all available hardware data, the system selectively monitors specific counters that provide the highest detection value, reducing computational resource consumption while maintaining detection effectiveness.
3Measurement precision
If attack data is used for training the detection model, then detection accuracy for known attacks is improved, but generalizability to new attacks deteriorates
Solution Approach 1:
The system inverts the conventional approach by training the anomaly detection model exclusively on benign workload data rather than using attack data for training. This inversion enables the model to learn normal behavior patterns and automatically detect deviations caused by any type of attack, including previously unseen attack variants, thereby achieving both high detection accuracy and broad generalizability.
Data Source
AI summary
Methods, apparatus, systems and articles of manufacture for detecting a side channel attack using hardware performance counters are disclosed. An example apparatus includes a hardware performance counter data organizer to collect a first value of a hardware performance counter at a first time and a second value of the hardware performance counter at a second time. A machine learning model processor is to apply a machine learning model to predict a third value corresponding to the second time. An error vector generator is to generate an error vector representing a difference between the second value and the third value. An error vector analyzer is to determine a probability of the error vector indicating an anomaly. An anomaly detection orchestrator is to, in response to the probability satisfying a threshold, cause the performance of a responsive action to mitigate the side channel anomaly.