Side-Face Connection Terminals for Stacked Semiconductor Packages
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Solution Overview
Problem
Conventional methods for electrically connecting semiconductor chips in three-dimensional modules face issues such as defects, difficulty in detecting and repairing connection errors, and limited flexibility in terminal placement and circuit assignment due to through-hole or side-face connections.
Innovation Solution
A method involving the formation of connection terminals on the side faces of stacked package elements, interconnected by a wiring pattern, using a conductive material sprayed in a mist state to ensure reliable electrical connections and increased flexibility in terminal placement and circuit assignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through-hole connection is used for electrical connection among semiconductor chips, then electrical connection can be established, but cracks easily occur in the semiconductor chip and connection errors are hard to detect and repair
Solution Approach 1:
The invention extracts the connection function from the traditional through-hole method and relocates it to the side face of the semiconductor chip. By forming connection terminals on the side face that protrude outward, the connection path is separated from the chip body, eliminating the risk of cracks while maintaining electrical connectivity. This allows external wiring to connect terminals without penetrating the chip structure.
Solution Approach 2:
The invention transitions from planar through-hole connections to three-dimensional side-face connections. Connection terminals are formed on the side face of the chip and extend outward, utilizing the vertical dimension to establish electrical connections. This dimensional change enables external wiring to access terminals from the side rather than through the chip thickness, improving reliability and detectability.
2Ease of manufacture
If connection terminals are formed on side face separately at different timing, then side face connection can be achieved, but connection between front face and back face terminals may be insufficient and electrical characteristics may extend beyond desired range
Solution Approach 1:
The invention merges the formation of front face, side face, and back face connection terminals into a single integrated process step. All connection terminals are formed simultaneously using the same patterning and deposition processes, ensuring consistent alignment and electrical characteristics. This eliminates the misalignment issues that arise from separate formation steps at different timings.
3Reliability
If adjacent semiconductor chips are electrically connected via connection terminal portions, then electrical connection is established, but degree of freedom in arrangement position and circuit kind assignment is reduced
Solution Approach 1:
The invention enables non-adjacent chip connections by extending connection terminals from the side face outward, creating a three-dimensional connection architecture. This allows wiring to connect terminals on different chips without requiring the chips to be adjacent, providing freedom in chip arrangement positions and enabling flexible circuit topology design including skip connections and reconfigurable architectures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables high-reliability connection terminals with desired electrical characteristics, reduces positional restrictions, and enhances circuit flexibility in three-dimensional semiconductor chip modules.
Implementation Method 1
a connection terminal led at least from the front face to the side face... by applying spraying of a conductive material in a mist state
Data Source
AI summary
A semiconductor chip module having high degree of freedom in assignment of a circuit to each semiconductor chip and in position of a connection terminal of each semiconductor chip is provided. The present invention relates to a semiconductor chip module in which a plurality of semiconductor chips, each provided on the side face thereof with a part of a connection terminal coupled with a circuit pattern formed on the front face, have been stacked and bonded. Connection terminal portions on the side faces of the respective semiconductor chips are interconnected by a wiring pattern. The connection terminal on the semiconductor chip is led from the front face to the side face and formed by applying spraying of a conductive material in a mist state.