Side Memory Cell Soft Programming for NAND Flash Leakage Reduction
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Solution Overview
Problem
NAND type flash memory devices face challenges in efficiently erasing data across memory cell blocks due to uneven threshold voltage distribution, leading to increased leakage current and reduced sensing margin in non-selected memory cells.
Innovation Solution
The method involves applying an erasing voltage to selected memory cell blocks, performing soft programming on side memory cells to increase their threshold voltage, and verifying the erasure process to ensure all memory cells meet a target voltage threshold, thereby reducing leakage current and improving sensing margins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If erasing operation is performed on selected memory cell blocks, then data is erased from the selected blocks, but threshold voltage distribution becomes uneven and leakage current increases in non-selected blocks
Solution Approach 1:
The patent applies preliminary anti-action by performing soft programming on side memory cells before the erasing operation completes. This pre-programming creates a protective threshold voltage distribution that counteracts the harmful leakage current effects that would otherwise occur in non-selected blocks during and after erasing.
Solution Approach 2:
The patent applies local quality by selectively programming only the side memory cells (drain side and source side memory cells) rather than all memory cells. This localized approach targets specific cells that are most susceptible to leakage current issues, creating different threshold voltage characteristics in side memory cells compared to regular memory cells.
2Object-generated harmful factors
If soft programming is performed on side memory cells, then threshold voltage distribution is improved and leakage current is reduced, but device operation complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the memory cell block into distinct functional zones: regular memory cells and side memory cells. This segmentation allows independent control and programming of side memory cells, enabling targeted threshold voltage adjustment without affecting the entire memory block, thus managing complexity through modular control.
Solution Approach 2:
The patent applies preliminary action by performing soft programming on side memory cells as an intermediate step between erasing and verification. This preliminary programming action prepares the side memory cells in advance to prevent leakage current issues, simplifying the overall control logic by handling the complexity in a structured sequence rather than requiring complex simultaneous control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the threshold voltage distribution of side memory cells, reducing leakage current in non-selected memory cell blocks and improving the sensing margin of selected memory cell blocks during programming and reading operations.
Implementation Method 1
the programming operation and the erasing operation are performed by FN (Fowler-Nordheim) tunneling which occurs in an insulation layer between the P-wells and the floating gates of memory cells
Implementation Method 2
as the electrons, which are present in the floating gates of the memory cells, are discharged into the P-wells by the FN tunneling, an erasing operation of the flash memory device is performed
Data Source
AI summary
A method for performing erasing operation in a nonvolatile memory device includes the steps of applying an erasing voltage to P-wells of a selected memory cell block which is composed of a plurality of strings in each of which a plurality of memory cells and side memory cells are connected in series; performing soft programming operation by applying a soft programming voltage to word lines of the selected memory cell block; and programming the side memory cells by applying a programming voltage to the side memory cells.