Side Mounted Interconnect Bridges for 3D Die Coupling
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Solution Overview
Problem
Conventional microelectronic device substrates require significant surface area to accommodate multiple silicon dies, leading to increased size and potential issues like crosstalk, insertion loss, and return loss, as dies must be attached to the same surface for effective interconnects.
Innovation Solution
The use of a passive interconnect bridge attached or embedded in the substrate's side surface, allowing for electrical coupling between semiconductor dies without requiring them to be on the same surface, utilizing materials like silicon, glass, or ceramic, and including repeater circuits, which reduces substrate size and improves signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple silicon dies are attached to the same surface of a substrate, then electrical interconnection between dies can be achieved, but the substrate size increases significantly
Solution Approach 1:
The patent transitions from a two-dimensional planar arrangement where all dies must be on the same surface to a three-dimensional configuration using vertical interconnect bridges. These bridges extend through the substrate thickness, enabling electrical connection between dies on opposite surfaces, thereby reducing the required substrate footprint while maintaining interconnect functionality.
Solution Approach 2:
The patent introduces interconnect bridges as intermediary structures that facilitate electrical connection between silicon dies. These bridges act as mediators, providing vertical pathways through the substrate that enable signal and power transmission without requiring lateral expansion of the substrate area.
2Area of stationary object
If silicon dies are placed close together on the same surface, then substrate size is reduced, but crosstalk and insertion loss increase
Solution Approach 1:
By moving interconnections from the lateral plane to the vertical dimension through the substrate, the patent eliminates the need for long lateral signal paths. This dimensional transition reduces signal path length and minimizes exposure to crosstalk and insertion loss while maintaining compact substrate size.
Solution Approach 2:
The patent implements localized vertical interconnect bridges at specific through-substrate locations rather than requiring extensive lateral interconnect networks. This localized approach concentrates interconnection functionality in specific vertical regions, reducing overall signal path length and minimizing harmful electromagnetic interactions.
3Ease of manufacture
If conventional substrate interconnects are used, then manufacturing is simple, but signal integrity deteriorates due to insertion loss and return loss
Solution Approach 1:
The patent introduces specialized interconnect bridge structures as intermediary elements that improve signal transmission. These bridges provide controlled impedance pathways and reduce signal reflections compared to conventional substrate traces, thereby improving signal integrity while maintaining manufacturing feasibility through established semiconductor fabrication processes.
Solution Approach 2:
The interconnect bridges utilize composite material structures combining conductive materials with substrate materials, creating optimized transmission pathways. This composite approach enables better signal integrity by controlling impedance and reducing losses while remaining compatible with standard manufacturing techniques.
Data Source
AI summary
A device and method of utilizing an interconnect bridge to electrically couple two semiconductor dies located on different surfaces. Integrated circuit packages using an interconnect bridge to electrically couple a semiconductor die on a substrate to a semiconductor die on a motherboard are shown. Integrated circuit packages using an interconnect bridge to electrically couple a semiconductor die on a top surface of a substrate to a semiconductor die on a bottom surface of a substrate are shown. Methods of electrically coupling semiconductor dies on different surfaces using interconnect bridges are shown.