Consolidated Sideband Channel for Low Power Interconnect
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Solution Overview
Problem
Conventional load/store communication protocols, such as PCIe™, are designed for high performance without considering power efficiency, making them unsuitable for low power applications like mobile devices, and their complex link management schemes complicate transitions between states.
Innovation Solution
A low power interconnect technology that converges a traditional PCIe™ protocol stack with a low power physical unit, such as M-PHY, to preserve performance while reducing power consumption, featuring optimized link training, flow control, and a consolidated sideband mechanism for efficient power management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If PCIe communication protocol is used for high performance communication, then communication speed and performance are improved, but power consumption increases and it becomes unsuitable for mobile systems
Solution Approach 1:
The communication system is segmented into two distinct protocols: PCIe protocol for high-performance communication when speed is critical, and a low-power protocol for routine communication when power savings are prioritized. This segmentation allows the system to dynamically select the appropriate protocol based on current operational requirements, thereby resolving the contradiction between communication speed and power consumption.
Solution Approach 2:
The system dynamically transitions between PCIe protocol and low-power protocol based on real-time communication demands and power state requirements. Link management mechanisms enable dynamic state transitions that adapt the communication mode to current system conditions, allowing the system to optimize the balance between performance and power consumption rather than being locked into a single static mode.
2Adaptability or versatility
If PCIe link management scheme is implemented to support multiple form factors, then adaptability is improved, but device complexity and state transition length increase
Solution Approach 1:
Link management functionality is extracted from the main communication data path and implemented as a separate, dedicated control mechanism. This extraction allows link management operations to be handled independently without complicating the primary data transmission path, thereby reducing overall device complexity while maintaining adaptability across different form factors.
Solution Approach 2:
A dedicated link management intermediary layer is introduced that handles all form factor compatibility and state transition logic separately from the main communication protocol. This intermediary absorbs the complexity of supporting multiple form factors and manages state transitions, preventing this complexity from propagating to the core communication functionality and reducing overall system complexity.
Data Source
AI summary
In an embodiment, the present invention includes a protocol stack having a transaction layer and a link layer. In addition a first physical (PHY) unit is coupled to the protocol stack to provide communication between a processor and a device coupled to the processor via a physical link, where the first PHY unit is of a low power communication protocol and includes a first physical unit circuit. In turn, a second PHY unit is coupled to the protocol stack to provide communication between the processor and the device via a sideband channel coupled between the multicore processor and the device separate from the physical link, where the second PHY unit includes a second physical unit circuit. Other embodiments are described and claimed.