Memory Metadata Storage Using Sideband ECC Routing

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Solution Overview

Problem

Current memory devices face inefficiencies in storing error control information and metadata, leading to increased access times and reduced available memory storage due to the need for additional operations and reserved memory space for error control data.

Innovation Solution

The implementation of a system that receives error control information and metadata via a sideband channel, using circuitry to route these data types to specific subsets of memory cells, allowing for increased storage capacity and diagnostic coverage by separating error control and metadata storage from main memory array operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If error control information is stored in the main memory array, then storage capacity is reduced, but access time increases due to additional operations

Engineering Contradiction:
Improveavailable memory storageVSAvoidaccess time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent divides the memory system into separate components: the main memory array for data storage and a dedicated error control memory for storing error control information. This segmentation allows independent access to data and error control information, eliminating the need for additional operations to access error control data from the main array, thus reducing access time while preserving main memory capacity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extracts error control information from the main memory array and stores it in a separate error control memory. This extraction removes the burden of storing and accessing error control information from the main memory system, increasing available storage capacity in the main array and enabling parallel access that reduces overall access time.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If error control information is stored separately from main memory, then diagnostic coverage increases, but device complexity increases

Engineering Contradiction:
Improvediagnostic coverageVSAvoidmemory architecture complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the error control memory with the main memory array in a unified memory device architecture, where both components work together under a single control system. This merging approach enables enhanced diagnostic coverage by having dedicated error control storage while maintaining a relatively simple overall device structure through integrated control logic.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If metadata is stored via sideband channel, then storage efficiency increases, but device complexity increases

Engineering Contradiction:
Improvestorage efficiencyVSAvoidcommunication interface complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements a sideband communication channel that serves multiple functions: transmitting metadata information, error control information, and control signals between the host device and memory device. This multi-functional sideband interface increases storage efficiency by enabling efficient metadata storage while managing device complexity through a versatile communication pathway.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12198776B2Metadata storage at a memory device
Publication Date: 2025.01.14 MICRON TECHNOLOGY INC
  • US12198776B2 patent drawing
  • US12198776B2 patent drawing
  • US12198776B2 patent drawing

AI summary

Methods, systems, and devices for metadata storage at a memory device are described to support storage of metadata information and error control information at a memory device. The metadata information and error control information may be received at the memory device via a sideband channel and corresponding pin. For example, a set of bits received via the pin may include a subset of error control bits and a subset of metadata bits. Circuitry at the memory device may receive the set of bits via the pin and may identify metadata information and error control information within the set of bits. The circuitry may route the metadata information to a corresponding subset of memory cells and the error control information to an error control circuit, where the error control circuit may route the error control information to a corresponding subset of memory cells.