Sideband Message Interface for SoC IP Integration

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Solution Overview

Problem

The integration of diverse intellectual property (IP) blocks into a single system-on-chip (SoC) is complex due to varying requirements and design uniqueness, necessitating extensive customization and re-design for interface and signaling compatibility, particularly for out-of-band communications.

Innovation Solution

A standardized sideband message interface is provided, instantiated within each agent and coupled by a fabric that includes router circuitry for communication, allowing for easier integration of IP blocks with a reduced number of wires and flexibility in customization, using the IOSF specification to standardize interconnect protocols across different types of chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If diverse IP blocks are integrated into a single SoC to achieve functionality accumulation, then the device functionality and performance are improved, but the design complexity and customization requirements increase significantly

Engineering Contradiction:

Improvedevice functionalityVSAvoiddesign complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a universal interrupt interface that can handle multiple types of interrupt signals (level-triggered, edge-triggered, masked, unmasked) through a single standardized interface. This allows diverse IP blocks with different interrupt requirements to be integrated into the SoC without requiring custom interface design for each block, thereby reducing design complexity while maintaining functionality accumulation

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The interrupt interface is segmented into distinct functional components: interrupt signal reception, interrupt type identification, interrupt registration, and interrupt handling. This modular segmentation allows each component to be independently configured and managed, reducing overall design complexity while supporting diverse IP block requirements

Inventive Principle:

Principle #1Segmentation

2Adaptability or versatility

If IP blocks are re-designed to accommodate specific SoC interface requirements, then interface compatibility is improved, but the design time and development cost increase

Engineering Contradiction:

Improveinterface compatibilityVSAvoiddesign time

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent creates a universal interrupt interface that can accommodate multiple IP block types without requiring re-design. The interface supports both level-triggered and edge-triggered interrupts, as well as masked and unmasked interrupts, through a single standardized design. This eliminates the need to re-design interrupt interfaces for each IP block integration, significantly reducing design time while maintaining compatibility

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The interrupt interface is pre-configured with support for multiple interrupt types and handling modes. By anticipating diverse IP block requirements and building this support into the standardized interface from the beginning, the patent eliminates the need for later re-design efforts when integrating different IP blocks into the SoC

Inventive Principle:

Principle #10Preliminary action

3Adaptability or versatility

If specialized wires and communication protocols are added for each IP block, then the out-of-band communication capability is improved, but the wire count and physical complexity increase

Engineering Contradiction:

Improvecommunication capabilityVSAvoidwire count

Core Design Contradiction:

Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent implements a universal interrupt interface that can handle multiple communication protocols and signal types through a single wire interface. The interface can process level-triggered interrupts, edge-triggered interrupts, masked interrupts, and unmasked interrupts all through the same physical connection, thereby reducing wire count while maintaining comprehensive communication capability

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges multiple interrupt signal types and protocols into a single unified interrupt interface. Instead of having separate wires for level-triggered interrupts, edge-triggered interrupts, masked interrupts, and unmasked interrupts, the patent combines all these functions into one standardized interface, significantly reducing the wire count while preserving all communication capabilities

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS9213666B2Providing a sideband message interface for system on a chip (SoC)

Publication Date: 2015.12.15 TAHOE RES LTD

AI summary

According to one embodiment, a system on a chip includes multiple agents each corresponding to an intellectual property (IP) logic and a fabric to couple the agents. The fabric can include a primary message interface and a sideband message interface. The fabric further includes one or more routers to provide out-of-band communications between the agents via this sideband message interface. To effect such communication, the router can perform a subset of ordering rules of a personal computer (PC)-based specification for sideband messages. Other embodiments are described and claimed.