Sidewall Conductive Strips for 3D Memory Density
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Solution Overview
Problem
As semiconductor devices shrink, their storage capacity and reliability decrease, making it challenging to develop memory devices with reduced sizes and increased storage capacities while maintaining performance.
Innovation Solution
The semiconductor structure involves forming conductive strips on the sidewalls of a main body structure, increasing memory storage capacity per unit area horizontally and reducing device size, with a manufacturing method that includes forming dielectric and conductive layers to enhance operation control and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If the size of memory devices is reduced, then the device size decreases, but the storage volume of electrons decreases and reliability decreases
Solution Approach 1:
The patent transitions from planar memory structures to three-dimensional structures by forming conductive strips on the sidewalls of main body structures. This vertical stacking approach increases storage density without proportionally reducing device footprint, thereby maintaining reliability while achieving size reduction. The sidewall conductive strips create additional storage dimensions above the substrate plane.
Solution Approach 2:
The patent implements nested structures where conductive strips are formed within and around main body structures. The first and second conductive strips are positioned on opposite sidewalls of the same main body structure, creating a nested configuration that maximizes storage capacity within a confined vertical space, thus improving reliability without increasing device size.
2Length of stationary object
If the size of memory devices is reduced, then the device size decreases, but the storage capacity in unit area decreases
Solution Approach 1:
By forming conductive strips on the vertical sidewalls of main body structures rather than only on the substrate plane, the patent creates additional storage capacity in the vertical dimension. This three-dimensional arrangement increases the quantity of storage elements per unit area while keeping the device footprint small.
Solution Approach 2:
The patent divides the memory structure into multiple segments by forming separate first and second conductive strips on opposite sidewalls of main body structures. Each sidewall conductive strip acts as an independent storage element, and multiple such segments can be packed into a small area, thereby increasing storage capacity per unit area while maintaining compact device size.
Data Source
AI summary
A semiconductor structure and a manufacturing method and an operating method of the same are provided. The semiconductor structure includes a substrate, a main body structure, a first dielectric layer, a first conductive strip, a second conductive strip, a second dielectric layer, and a conductive structure. The main body structure is formed on the substrate, and the first dielectric layer is formed on the substrate and surrounding two sidewalls and a top portion of the main body structure. The first conductive strip and the second conductive strip are formed on two sidewalls of the first dielectric layer, respectively. The second dielectric layer is formed on the first dielectric layer, the first conductive strip, and the second conductive strip. The conductive structure is formed on the second dielectric layer.