Sidewall Image Transfer for MRAM Patterning
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Solution Overview
Problem
Current semiconductor fabrication techniques for MRAM cells face challenges in achieving critical dimension uniformity and size variability, particularly below 20 nanometers, due to limitations in resist performance and the need for complex structures like capacitors in DRAM cells and slow write/erase times in flash memory.
Innovation Solution
The use of sidewall image transfer (SIT) processes with a spacer material, such as tantalum nitride (TaN), to pattern MRAM cells, allowing for improved critical dimension uniformity and eliminating the need for a hard mask etching step, which enhances size uniformity and scalability to sub-193 resolution pitches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional resist patterning techniques are used for MRAM cells, then the patterning process is simpler, but critical dimension uniformity deteriorates below 20 nanometers
Solution Approach 1:
The patterning process is divided into multiple stages: forming mandrels with initial dimensions, depositing spacer material around mandrels, selectively removing mandrels, and performing additional etching steps. This segmentation allows each step to be optimized independently, achieving sub-20nm critical dimension uniformity through the cumulative effect of controlled spacer deposition and selective removal processes.
Solution Approach 2:
Mandrels are formed in advance with dimensions larger than the final desired critical dimension. The spacer material is then deposited around these pre-formed mandrels, and the mandrels are selectively removed. This preliminary action allows the final structure to achieve precise dimensions through the spacer thickness control rather than direct lithographic patterning, overcoming resist performance limitations.
2Manufacturing precision
If hard mask etching steps are included in the patterning process, then etching control is improved, but size variability increases and scalability to sub-193 resolution pitches is reduced
Solution Approach 1:
The traditional hard mask etching step is completely removed from the patterning sequence. Instead, the spacer material itself serves as the defining structure for the final pattern. The mandrels are selectively removed after spacer deposition, eliminating the need for separate hard mask formation and etching steps. This extraction of the hard mask step reduces process complexity and improves size uniformity while maintaining scalability to sub-193 resolution pitches.
Solution Approach 2:
The spacer material performs multiple functions: it defines the final pattern geometry, serves as the etch mask for subsequent processing, and provides the precise critical dimensions through controlled deposition thickness. This multi-functionality replaces the traditional separate hard mask layer and eliminates the need for hard mask etching steps, improving both size uniformity and manufacturing throughput.
Data Source
AI summary
A method of forming a semiconductor structure includes forming a first spacer material over two or more mandrels disposed over a magnetoresistive random-access memory (MRAM) stack. The method also includes performing a first sidewall image transfer of the two or more mandrels to form a first set of fins of the first spacer material over the MRAM stack, and performing a second sidewall image transfer to form a plurality of pillars of the first spacer material over the MRAM stack. The pillars of the first spacer material form top electrodes for a plurality of MRAM cells patterned from the MRAM stack.