Sidewall Mask Structure for Uniform Capacitor Hole Etching
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Solution Overview
Problem
In the manufacturing of capacitor memory, the use of double layers of mask patterns with oblique intersections leads to defects such as varying aperture sizes, insufficient etching, and poor direction consistency of capacitor holes, resulting in decreased stored power quantity and wafer yield.
Innovation Solution
A method involving the sequential stacking of a first dielectric layer, a sacrificial layer, and a second dielectric layer, followed by patterning and formation of initial mask patterns on sidewalls, with controlled etching rates to create first and second mask patterns that intersect, ensuring uniform aperture size and direction consistency of capacitor holes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If double layers of mask patterns with oblique intersections are used, then capacitor holes can be formed, but aperture size uniformity and direction consistency deteriorate
Solution Approach 1:
The mask pattern formation process is divided into multiple sequential steps: first forming initial mask patterns on sidewalls, then forming first mask patterns after removing sacrificial layers, and finally forming second mask patterns on the first mask patterns. This segmentation allows each step to be optimized independently, ensuring uniform aperture sizes and consistent directions without the defects of oblique intersections.
Solution Approach 2:
Initial mask patterns are formed on the sidewalls of pattern structures before the final mask patterns are created. These preliminary mask patterns serve as templates that guide the subsequent formation of first and second mask patterns, ensuring proper alignment and uniformity from the outset rather than relying on oblique intersections.
2Manufacturing precision
If oblique intersecting mask patterns are used, then capacitor holes are formed, but etching completeness deteriorates
Solution Approach 1:
The etching process is segmented into multiple stages corresponding to the removal of different layers: etching through the second dielectric layer and sacrificial layer to form initial mask patterns, then etching through the first dielectric layer using first mask patterns, and finally using second mask patterns. Each etching stage is optimized for complete removal of the specific layer, ensuring no residual material remains and improving wafer yield.
Solution Approach 2:
The sacrificial layer and second dielectric layer are patterned in advance to create initial mask patterns on sidewalls before the main etching process. This preliminary patterning ensures that subsequent etching operations have precise templates to follow, achieving complete etching without insufficient penetration.
3Manufacturing precision
If mask patterns are formed on sidewalls with filling layers, then initial mask patterns are created, but process complexity increases
Solution Approach 1:
A filling layer is introduced as an intermediary material between adjacent initial mask patterns on the sidewalls. This filling layer serves as a mediator that maintains proper spacing and alignment between mask patterns during subsequent processing steps, ensuring precise alignment without requiring direct contact or complex positioning between adjacent structures.
Solution Approach 2:
The filling layer is a temporary structure that serves its alignment function during critical processing steps and is then completely removed in subsequent steps. This disposable element enables precise mask pattern alignment during formation but does not remain in the final device, avoiding permanent complexity.
Data Source
AI summary
A method for manufacturing a mask structure includes: patterning a sacrificial layer and a second dielectric layer, so as to form pattern structures each including a first pattern and a second pattern, and a width of a lower portion of the pattern structures is less than a width of a upper portion of the pattern structures; forming an initial mask pattern on sidewalls of each of the plurality of pattern structures; filling a first filling layer between adjacent initial mask patterns located on the sidewalls of different pattern structures; removing the second patterns and the initial mask pattern located on sidewalls of each of the plurality of second patterns; removing the first filling layer and the first patterns, so as to form first mask patterns; and forming second mask patterns on the first mask patterns.


