Sidewall Interconnect Package Layout for Compact Power Routing
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Solution Overview
Problem
There is a need for packages with improved performance and a more compact form factor to accommodate smaller devices, requiring enhanced power distribution and integration of multiple components efficiently.
Innovation Solution
The package design includes a substrate with integrated devices connected via bump interconnects, encapsulation layers, metallization portions, and side wall interconnects, which provide efficient power distribution and integration through multiple electrical paths, including power and ground paths, to improve performance and compactness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional power distribution methods are used in packages, then the package structure is simpler, but the power distribution efficiency is lower and the form factor cannot be sufficiently compact
Solution Approach 1:
The patent introduces side wall interconnects that extend vertically along the sides of the encapsulation layer, transitioning from traditional planar power distribution to a three-dimensional configuration. This allows power and ground paths to be established in the vertical dimension, improving power distribution efficiency without significantly increasing the horizontal footprint of the package.
Solution Approach 2:
The side wall interconnects are embedded within or coupled to the encapsulation layer structure, with metallization portions integrated into the vertical walls. This nesting approach allows the power distribution network to be incorporated within the existing package structure rather than adding external components, achieving compact integration.
2Reliability
If more interconnects are added to improve power distribution, then the power delivery capability is enhanced, but the manufacturing complexity increases
Solution Approach 1:
The power distribution network is segmented into multiple independent paths including bottom interconnects, side wall interconnects, and top interconnects. This segmentation allows for modular manufacturing where each segment can be formed and tested independently, reducing overall manufacturing complexity despite the increased number of interconnects.
Solution Approach 2:
The side wall interconnects and metallization portions are formed as part of the encapsulation layer structure during the packaging process, rather than being added as separate post-processing steps. This preliminary integration into the encapsulation workflow reduces manufacturing complexity by combining multiple operations into a unified process sequence.
Data Source
AI summary
A device comprising a package. The package comprises a package substrate; a first integrated device coupled to the package substrate through a first plurality of bump interconnects; an encapsulation layer at least partially encapsulating the first integrated device; a plurality of post interconnects located in the encapsulation layer; a metallization portion coupled to the plurality of post interconnects; a second integrated device coupled to the metallization portion through a second plurality of bump interconnects; and a plurality of side wall interconnects coupled to the encapsulation layer and the metallization portion.