Sidewall Pattern Formation for NAND Flash Memory
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Solution Overview
Problem
The miniaturization of semiconductor devices poses challenges in forming line and space patterns below the resolution limit of lithography, particularly in NAND type flash memory manufacturing, where it is difficult to achieve small gaps between word lines and selection gate lines due to alignment issues in photolithography.
Innovation Solution
A pattern forming method involving the formation of mixed periodic and non-periodic patterns, followed by conformal sidewall film deposition and selective etching, allows for the creation of sidewall patterns that enable precise etching of word lines and selection gate lines with reduced gap sizes, using a combination of lithography and anisotropic etching techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithography technique is used to form patterns, then alignment is required which increases the gap between word lines and selection gate lines, but using different exposure processes for fine patterns and large sized patterns increases manufacturing complexity
Solution Approach 1:
The pattern formation process is segmented into two distinct approaches: (1) forming a line-and-space resist pattern for word lines using first exposure conditions, and (2) forming a continuous resist pattern for selection gate lines and peripheral circuits using second exposure conditions. This segmentation allows each region to be optimized independently, enabling small gaps in word line regions while using simpler continuous patterns for larger structures, thereby reducing overall manufacturing complexity.
Solution Approach 2:
Different exposure conditions are applied to different regions of the substrate: first exposure conditions (higher precision) are used for the word line forming region where small gaps are critical, while second exposure conditions (lower precision) are used for selection gate line and peripheral circuit regions where larger gaps are acceptable. This local differentiation optimizes manufacturing precision where needed while reducing complexity elsewhere.
2Manufacturing precision
If alignment is required during photolithography to form patterns, then the gap between word lines and selection gate lines cannot be reduced to the same level as gaps between word lines, but reducing alignment requirements increases manufacturing precision
Solution Approach 1:
The resist pattern formation is segmented into word line regions and selection gate line regions, with each region exposed under different conditions. Word line regions receive exposure that creates line-and-space patterns requiring precise alignment, while selection gate line regions receive exposure that creates continuous patterns requiring minimal or no alignment. This segmentation eliminates the need for high-precision alignment between different pattern types while maintaining small gaps where required.
Solution Approach 2:
Instead of using a single continuous resist pattern that requires alignment to achieve small gaps everywhere, the invention inverts the approach by using line-and-space patterns for word lines (where small gaps are needed) and continuous patterns for selection gate lines (where alignment is problematic). This inversion allows the system to achieve small gaps in critical regions without requiring alignment precision for the entire substrate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method allows for the reduction of the gap between word lines and selection gate lines, improving the density of NAND type flash memory devices and reducing manufacturing costs by enabling the use of lower precision exposure devices.
Implementation Method 1
conformally forming and etching back the sidewall film on the processing object
Implementation Method 2
etched using the resist pattern as a mask by an RIE (reactive ion etching) method
Data Source
AI summary
According to one embodiment, firstly, an inversion pattern having a periodic pattern in which a first line pattern and a space are inversed and a non-periodic pattern arranged at an interval which is substantially equal to the width of the first line pattern from the end of the periodic pattern is formed above a processing object so as to correspond to the plurality of spaces between a plurality of first line patterns in a first pattern and the space between the first pattern and a second pattern. Next, a sidewall film is formed around the inversion pattern, and the periodic pattern is removed selectively. Thereafter, the processing object is etched using the sidewall pattern formed of the sidewall film and the non-periodic pattern surrounded by the sidewall film as masks.