Semiconductor Trench Formation Using Sidewall Spacer Alignment
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Solution Overview
Problem
The existing semiconductor manufacturing processes, particularly those using extreme ultraviolet technology combined with litho-etch-litho-etch (LELE), result in a relatively large head-to-head (HTH) dimension between neighboring metal wires, which does not match the expected target, leading to alignment issues and performance problems.
Innovation Solution
A method is introduced where a patterned core layer is formed on the mask layer, followed by the deposition of a sidewall spacer material layer on the core layer and mask layer surfaces. This sidewall spacer is used as an alignment reference for subsequent photolithography, ensuring that the sidewall spacer is outside the trench, thus avoiding its impact on the trench pattern and allowing for the formation of conductive layers with a consistent and reduced HTH dimension.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a sidewall is formed on the inner surface of the first trench to serve as alignment reference, then self-alignment is realized and EPE is reduced, but the sidewall affects the head to head (HTH) dimension of neighboring first metal wires, causing the HTH dimension to be large and not matching the expected target
Solution Approach 1:
The patent divides the sidewall structure into two distinct parts: a first sidewall formed on the inner surface of the first trench for alignment reference, and a second sidewall formed on the outer surface of the first trench that does not affect the HTH dimension. This segmentation allows each sidewall to serve its specific function independently, resolving the contradiction between alignment precision and HTH dimension control
Solution Approach 2:
The patent introduces a spatial dimension distinction by forming sidewalls on both the inner and outer surfaces of the first trench. The second sidewall on the outer surface provides an additional alignment reference that does not interfere with the HTH dimension, effectively using dimensional separation to resolve the contradiction
Data Source
AI summary
A method for forming a semiconductor device includes providing a to-be-etched layer, forming a first mask layer on the to-be-etched layer, forming a patterned core layer on the first mask layer of a first region, forming a sidewall spacer material layer on the core layer and the first mask layer, removing the sidewall spacer material layer on a top surface of the core layer, removing the core layer and the first mask layer at a bottom of the core layer to form a first trench, removing the sidewall spacer material layer on the first mask layer of a second region, forming a first patterned layer exposing the first mask layer of the second region, and using the first patterned layer as a mask to remove the first mask layer of the second region to form a second trench.