Sidewall Spacer PCM Memory Bit Formation
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Solution Overview
Problem
Phase change memories (PCMs) face challenges in achieving consistent state changes and data retention due to residual crystalline material acting as seeds for further growth, leading to logic state loss over time, especially under heat, and require a reliable process for forming the desired device structure without reliability issues.
Innovation Solution
A method involving the formation of a PCM stack with a heater layer, a phase change material, and a top electrode layer, protected by a sidewall spacer and anti-reflective coating, where anisotropic etching techniques are used to prevent back sputtering and ensure complete conversion to the amorphous state, preventing crystalline remnant formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional etching processes are used to form the PCM stack, then manufacturing simplicity is maintained, but back sputtering occurs causing heater layer material to deposit on the PCM stack creating electrical shorts
Solution Approach 1:
A sidewall spacer is introduced as an intermediary protective structure between the heater layer and the PCM stack during the etching process. This spacer acts as a physical barrier that prevents back sputtered heater layer material from depositing on the PCM stack, thereby eliminating electrical shorts while maintaining process simplicity
Solution Approach 2:
The sidewall spacer is formed in advance before the etching process that removes the heater layer. This preliminary protective structure is prepared beforehand to prevent the harmful back sputtering effect from occurring, ensuring reliability before the problem can manifest
2Use of energy by moving object
If the phase change material is not completely converted to amorphous state, then energy consumption is reduced, but crystalline remnants act as seeds for further crystalline growth causing data retention problems
Solution Approach 1:
The patent modifies the etching process parameters to achieve complete amorphous conversion of the phase change material. By adjusting etching conditions to ensure thorough conversion, crystalline remnants are eliminated, preventing them from acting as seeds for unwanted crystalline growth and ensuring data retention
3Reliability
If higher temperatures are applied to ensure complete amorphous conversion, then data retention is improved, but crystalline growth may occur leading to logic state loss
Solution Approach 1:
The patent extracts and removes all crystalline material from the phase change layer through controlled etching processes. By completely removing crystalline remnants that could act as growth seeds, the structure is left in a stable amorphous state that maintains data retention without requiring exposure to temperatures that would trigger unwanted crystalline growth
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents crystalline growth, ensuring reliable data retention and consistent state changes in phase change memory devices by protecting the PCM stack from back sputtering and ensuring complete conversion to the amorphous state, thus maintaining logic states even under operational heat.
Implementation Method 1
a subsequent etch, which is typically an etch that causes back sputtering of the material being etched, is then performed on the bottom conductive layer
Implementation Method 2
phase change memories (PCMs) have advantages over other non-volatile memories (NVMs)
Data Source
AI summary
A method of making a phase change random access memory (PCM) device comprises forming a PCM stack that includes a heater layer, phase change material layer, and a top electrode layer. A top protection layer is formed overlying the PCM stack. The top protection layer and a first portion of the PCM stack are then patterned, wherein the first portion of the PCM stack excludes the heater layer. A sidewall protection feature is formed along a sidewall of the patterned top protection layer and first portion of the PCM stack. The heater layer is etched using (i) the sidewall protection feature and (ii) the patterned top protection layer and first portion of the PCM stack collectively as a mask to form a self-aligned heater layer bottom electrode of the PCRAM stack, thereby completing a memory bit of the PCRAM device.