Semiconductor Structure Sidewall Spacer Fabrication
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Solution Overview
Problem
The shrinking size of semiconductor devices poses challenges to photolithography, requiring multiple patterning processes that increase production time and cost due to the need for additional processing steps and masks.
Innovation Solution
A method involving the formation of discrete sidewall spacers and trenches on a sacrificial film, where a second sidewall spacer fills the first sidewall trench, merging the spacers and eliminating the need for subsequent photolithography to remove fins, thereby reducing production time and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a multiple patterning process is used to form smaller features, then the critical dimension limit is overcome, but the production time and cost increase due to additional processing steps
Solution Approach 1:
The patent segments the patterning process into multiple stages using different spacer types (first sidewall spacers, second sidewall spacers, third sidewall spacers) with different widths. Each segmentation stage creates finer features through self-aligned spacer formation, achieving sub-lithographic dimensions without requiring multiple photolithography cycles, thus reducing production time while maintaining precision
Solution Approach 2:
The patent transitions from planar 2D patterning to 3D vertical spacer structures. By forming sidewall spacers vertically on sacrificial layers and using selective etching to create trenches at different depths, the process achieves fine horizontal feature dimensions through vertical dimension control, enabling higher precision without additional lithography steps
2Manufacturing precision
If a multiple patterning process is used to form smaller features, then the critical dimension limit is overcome, but the manufacturing cost increases due to additional masks and processing steps
Solution Approach 1:
The patent employs self-aligned spacer formation where each spacer automatically positions itself relative to previous structures without requiring additional photolithography alignment steps. The sacrificial layers and spacers serve their own positioning function, eliminating the need for separate mask alignment and reduction processes, thereby reducing manufacturing cost while achieving fine critical dimensions
Solution Approach 2:
The patent changes the width parameter of spacers progressively (first sidewall spacers, then second sidewall spacers with different widths, then third sidewall spacers) to achieve feature size reduction. This parameter-based approach replaces the need for multiple photolithography masks with different patterns, reducing material cost and process complexity while maintaining manufacturing precision
3Manufacturing precision
If photolithography is used to remove fins after multiple patterning, then the pattern is finalized, but additional processing time and cost are incurred
Solution Approach 1:
The patent extracts and removes sacrificial layers selectively at different stages to define the final fin structures. By taking out the sacrificial material through selective etching rather than using photolithography to define fins, the process simplifies the final patterning step, reducing both process complexity and additional processing requirements while maintaining pattern accuracy
Solution Approach 2:
The patent performs preliminary spacer formation and sacrificial layer removal to pre-define the fin positions and dimensions before final etching. This preliminary action establishes the pattern geometry in advance, eliminating the need for subsequent photolithography fin removal steps and reducing overall process complexity while ensuring manufacturing precision
Data Source
AI summary
Semiconductor structures and fabrication methods are provided. An exemplary fabrication method includes providing a to-be-etched layer; forming a first sacrificial film on the to-be-etched layer; and forming a plurality of discrete first sidewall spacers and sidewall trenches on the first sacrificial film. Each sidewall trench is located between two adjacent first sidewall spacers; the first sidewall trenches include a first sidewall trench and a second sidewall trench, and a width of the second sidewall trench is greater than that of the first sidewall trench. The method also includes forming a second sidewall spacer in the first sidewall trench to fill the first sidewall trench; and etching the first sacrificial film using the first sidewall spacers and the second sidewall spacer as an etching mask to form a plurality of discrete first sacrificial layers on the to-be-etched layer.