SIDO Switching Converter Control for Stable Fixed-Frequency Operation
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Solution Overview
Problem
Conventional SIDO converters suffer from variable switching frequency dependent on load, inducing noise and requiring extensive analog trimming and semiconductor area, with open-loop regulation and analog complexity.
Innovation Solution
Implementing a circuit with frequency-locked-loop (FLL) and feedforward (FFWD) processing to control switching frequency based on inductor current amplitude, using digital feedback and digital-to-analog converters to regulate quasi-fixed frequency operation and improve transient response.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional SIDO converters are used with open-loop regulation, then the circuit structure is simple, but the switching frequency varies significantly with load causing noise and requiring extensive analog trimming
Solution Approach 1:
The patent replaces the analog OTA-based open-loop frequency regulation with a digital closed-loop system. A frequency-locked loop (FLL) controller digitally processes feedback signals and generates control signals for the switching converter, substituting mechanical/analog trimming components with digital signal processing to achieve stable frequency without extensive analog trimming
Solution Approach 2:
The patent implements a closed-loop feedback system where the switching frequency is monitored and fed back to a digital FLL controller. The controller adjusts the duty cycle based on the frequency error signal, automatically regulating the switching frequency to remain stable across varying load conditions, eliminating the need for manual analog trimming
2Reliability
If operational transconductance amplifiers (OTAs) are used for frequency regulation, then frequency control is achieved, but semiconductor area and test resources are significantly increased
Solution Approach 1:
The patent substitutes the large-area analog OTA blocks with compact digital logic circuits implementing the frequency-locked loop controller. The digital implementation uses standard cell libraries and requires significantly less semiconductor area while providing equivalent or superior frequency regulation capability
Solution Approach 2:
The patent uses a digital model of the frequency control function instead of physical analog OTA components. The FLL controller digitally replicates the frequency regulation behavior that would otherwise require complex analog circuitry, reducing area while maintaining functionality
3Adaptability or versatility
If variable switching frequency operation is used, then the converter adapts to load changes, but noise is induced in the system sensitive bandwidth
Solution Approach 1:
The patent employs a frequency-locked loop feedback mechanism that continuously monitors the switching frequency and adjusts the duty cycle to maintain a fixed frequency. This closed-loop control prevents frequency variations that would otherwise cause noise in the system sensitive bandwidth, while still allowing the converter to adapt to load changes through duty cycle modulation
Solution Approach 2:
The patent changes the control parameter from frequency modulation to duty cycle modulation. Instead of allowing the switching frequency to vary with load (which causes noise), the system maintains constant frequency and adapts to load changes by adjusting the duty cycle, thereby eliminating noise while preserving adaptability
4Reliability
If digital feedback processing with FLL is implemented, then switching frequency is stabilized, but circuit complexity increases
Solution Approach 1:
The patent designs the digital FLL controller to perform multiple functions: frequency measurement, error signal generation, duty cycle modulation, and load adaptation. By consolidating these functions into a single digital control block, the circuit complexity is minimized while achieving stable switching frequency regulation
Solution Approach 2:
The patent merges the frequency regulation and load adaptation functions into a unified digital FLL control architecture. The same digital controller that stabilizes frequency also handles load transient response through integrated feedforward compensation, reducing overall circuit complexity compared to separate control loops
Data Source
AI summary
An embodiment circuit comprises first and second output nodes with an inductor arranged therebetween, and first and second switches coupled to opposed ends of the inductor. The switches are switchable between non-conductive and conductive states to control current flow through the inductor and produce first and second output voltages. The current intensity through the inductor is compared with at least one reference value. Switching control circuitry is coupled with the first and second switches, the first and second output nodes, and current sensing circuitry, which is configured to control the switching frequency of the first and second switches as a function of the output voltages and a comparison at the current sensing circuitry. The switching control circuitry is configured to apply FLL-FFWD processing to produce the reference values as a function of a timing signal, targeting maintaining a constant target value for the converter switching frequency.


