SiGe Antifuse Interface for Reliable Dielectric Breakdown

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Solution Overview

Problem

Conventional antifuses in semiconductor memory devices experience unreliable breakdowns due to variance in conductive paths and high impedance issues when a high voltage is applied, leading to defects and errors in memory cells.

Innovation Solution

Incorporating a silicon-germanium alloy in the antifuse structure, which enhances carrier mobility and facilitates controlled breakdown by concentrating charged particles at specific interfaces, creating a reliable conductive path when a high voltage is applied.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional planar interface is used between the active region and dielectric layer in antifuse, then the structure is simple and easy to manufacture, but the breakdown is unreliable with variance in conductive paths and high impedance

Engineering Contradiction:
Improvebreakdown reliabilityVSAvoidinterface structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies composite materials by forming a silicon-germanium alloy layer at the interface between the active region and dielectric layer. This alloy layer combines silicon and germanium to create a material with superior electrical properties, specifically higher carrier mobility, which enables more reliable breakdown and lower impedance compared to conventional planar interfaces.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent implements local quality by concentrating the silicon-germanium alloy specifically at the interface region where breakdown occurs, rather than throughout the entire structure. This localized enhancement of material properties at the critical interface area improves breakdown reliability and conductive path formation without unnecessarily complicating the overall device structure.

Inventive Principle:
Principle #3Local quality

2Reliability

If silicon-germanium alloy is implemented in antifuse structure, then carrier mobility increases and breakdown reliability improves, but manufacturing process complexity increases

Engineering Contradiction:
Improveconductive path reliabilityVSAvoidantifuse manufacturing
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies preliminary action by forming the silicon-germanium alloy layer at the interface before the dielectric layer is deposited. This sequence ensures that the alloy structure is already in place to guide and concentrate charged particles during the subsequent breakdown process, improving reliability while managing manufacturing complexity through optimized process sequencing.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The silicon-germanium alloy in the antifuse structure ensures consistent and efficient breakdown, reducing defects and errors in memory cells by improving the reliability of the conductive path formation.

Implementation Method 1

The SiGe alloy has higher carrier mobility compared to monocrystalline silicon (Si). Due to high carrier mobility of the silicon-germanium in the channel region

Methodology Applied
Scientific EffectCarrier mobility enhancement:

Implementation Method 2

which enhances carrier mobility and facilitates controlled breakdown by concentrating charged particles at specific interfaces

Methodology Applied
Scientific EffectCharged particle concentration:

Implementation Method 3

An antifuse can permanently create an electrically conductive path when a relatively high voltage is applied across the antifuse. An antifuse can have a structure similar to that of a capacitor, i.e., two conductive electrical terminals are separated by a dielectric layer, such as a gate oxide film. To create an electrically conductive path, a relatively high voltage is applied across the terminals, breaking down the interposed dielectric layer and forming a conductive link between the antifuse terminals.

Methodology Applied
Scientific EffectDielectric breakdown:

Data Source

PatentUS11843035B2Transistor interface between gate and active region
Publication Date: 2023.12.12 MICRON TECHNOLOGY INC
  • US11843035B2 patent drawing
  • US11843035B2 patent drawing
  • US11843035B2 patent drawing

AI summary

Semiconductor devices including structures of active region are disclosed. An example semiconductor device according to the disclosure includes a substrate, a layer on the substrate and a dielectric layer on the layer. The layer includes an interface in contact with the dielectric layer. The interface includes a first portion on a surface of the layer and a second portion perpendicular to the first portion.