SiGe Source/Drain Epitaxy Profile Without Facet Formation

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Solution Overview

Problem

The growth of silicon germanium (SiGe) epitaxial layers on source/drain regions of field effect transistors (FETs) often results in faceted profiles due to lattice mismatch with dielectric isolation regions, leading to non-uniform thickness and challenging contact formation.

Innovation Solution

A SiGe nanostructure is formed at the interface between the semiconductor and isolation regions to act as a growth surface with reduced lattice mismatch, promoting uniform SiGe epitaxial layer growth with horizontal top surfaces by doping the isolation region with Ge dopants.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If silicon germanium epitaxial layers are grown on source/drain terminals, then the transistor performance is improved, but the epitaxial layers develop a faceted profile which makes contact formation challenging

Engineering Contradiction:
Improvetransistor performanceVSAvoidcontact formation precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A silicon germanium nanostructure is formed at the interface between the semiconductor and isolation regions before growing the epitaxial layer. This preliminary structure serves as a growth template that guides the epitaxial layer to grow with a horizontal top surface, preventing facet formation and ensuring uniform thickness for accurate contact formation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The silicon germanium nanostructure acts as an intermediary between the underlying substrate and the overlying epitaxial layer. It mediates the lattice mismatch between silicon and dielectric isolation regions, providing a transition structure that enables uniform epitaxial growth without faceting while maintaining transistor performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If silicon germanium epitaxial layers are grown between active semiconductor region and dielectric isolation region, then the device functionality is achieved, but the faceted profile develops resulting in non-uniform thickness

Engineering Contradiction:
Improvedevice functionalityVSAvoidepitaxial layer thickness uniformity
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The interface region between the semiconductor and isolation regions is locally modified by forming a silicon germanium nanostructure. This localized modification creates a favorable growth environment specifically at the critical interface area, enabling uniform epitaxial layer thickness while maintaining the overall device functionality.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The lattice mismatch parameter is effectively changed by introducing the silicon germanium nanostructure with an intermediate composition between pure silicon and the dielectric isolation region. This parameter change in the growth interface enables uniform epitaxial layer formation without the faceted profile that would otherwise develop.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach eliminates facet formation, resulting in SiGe epitaxial layers with uniform thickness and improved etching process windows for contact openings, enhancing the reliability of contact formation on SiGe epitaxial layers.

Implementation Method 1

doping the isolation region with Ge dopants

Methodology Applied
Scientific EffectDoping: Dopants

Implementation Method 2

SiGe epitaxial layer growth

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS11942547B2Source/drain epitaxial layer profile
Publication Date: 2024.03.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11942547B2 patent drawing
  • US11942547B2 patent drawing
  • US11942547B2 patent drawing

AI summary

The present disclosure describes a method that mitigates the formation of facets in source/drain silicon germanium (SiGe) epitaxial layers. The method includes forming an isolation region around a semiconductor layer and a gate structure partially over the semiconductor layer and the isolation region. Disposing first photoresist structures over the gate structure, a portion of the isolation region, and a portion of the semiconductor layer and doping, with germanium (Ge), exposed portions of the semiconductor layer and exposed portions of the isolation region to form Ge-doped regions that extend from the semiconductor layer to the isolation region. The method further includes disposing second photoresist structures over the isolation region and etching exposed Ge-doped regions in the semiconductor layer to form openings, where the openings include at least one common sidewall with the Ge-doped regions in the isolation region. Finally the method includes growing a SiGe epitaxial stack in the openings.