SiGe Fin Trimming and Silicon Capping Against Oxidation

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Solution Overview

Problem

Existing methods for addressing short-channel effects and threshold voltage tuning in semiconductor devices, particularly with silicon germanium-based channels, are not entirely satisfactory due to susceptibility to oxidation reactions that degrade device performance.

Innovation Solution

A method involving selective trimming of silicon and silicon germanium fins before capping with a silicon layer to achieve precise fin dimensions, combined with epitaxial growth of the silicon cap, to prevent oxidation and enhance device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If silicon germanium fins are used to address short-channel effects and threshold voltage tuning, then device performance is improved, but susceptibility to oxidation reactions increases which degrades device performance

Engineering Contradiction:
Improvedevice performanceVSAvoidoxidation susceptibility
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A silicon-containing layer is deposited as an intermediary protective barrier between the silicon germanium fin and the oxidizing environment. This cap layer selectively protects the germanium-rich regions from oxidation while allowing the fin to maintain its electrical functionality. The cap acts as a mediator that prevents direct contact between oxygen and the oxidation-sensitive silicon germanium material.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The silicon-containing cap layer is deposited in advance before the device undergoes subsequent processing steps that could cause oxidation. By establishing this protective barrier beforehand, the method prevents oxidation from occurring during later fabrication processes, thereby maintaining the integrity and performance of the silicon germanium fin.

Inventive Principle:
Principle #9Preliminary anti-action

2Manufacturing precision

If existing trimming methods are used for silicon germanium fins, then fin formation is achieved, but precision and effectiveness of trimming are insufficient leading to degraded device performance

Engineering Contradiction:
Improvefin trimming precisionVSAvoiddevice performance
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The silicon-containing cap layer is deposited on the fin structure before final trimming operations. This preliminary capping action establishes a reference surface that enables more precise subsequent trimming. The cap layer serves as a template that helps achieve the desired fin dimensions with higher precision, and any excess cap material can be uniformly removed after trimming to reveal precisely dimensioned fins.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves the precision and effectiveness of fin trimming and capping, leading to enhanced device performance by preventing oxidation and maintaining desired fin dimensions, thus addressing the limitations of existing methods.

Implementation Method 1

susceptibility to oxidation reactions that degrade device performance

Methodology Applied
Scientific EffectOxidation prevention: Oxidation

Implementation Method 2

epitaxial growth of the silicon cap

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS12136651B2Silicon-germanium Fins and methods of processing the same in field-effect transistors
Publication Date: 2024.11.05 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12136651B2 patent drawing
  • US12136651B2 patent drawing
  • US12136651B2 patent drawing

AI summary

A semiconductor structure includes a SiGe fin protruding from a substrate, where the SiGe fin includes a top portion having a first sidewall and a second sidewall and a bottom portion having a third sidewall and a fourth sidewall, and where a first transition region connecting the first sidewall to the third sidewall and a second transition region connecting the second sidewall to the fourth sidewall each have a tapered profile extending away from the first sidewall and the second sidewall, respectively, and a Si-containing layer disposed on the top portion of the SiGe fin, where a portion of the Si-containing layer on the first transition region extends away from the first sidewall by a first lateral distance and a portion of the Si-containing layer on the second transition region extends away from the second sidewall by a second lateral distance that is different from the first lateral distance.