SiGe FinFET Fabrication via Si:C Interlayer Diffusion
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Solution Overview
Problem
The challenge is to fabricate semiconductor transistor devices, specifically FinFETs using SiGe alloys, where the critical thickness of SiGe layers limits the height of the Fin structure, leading to defect generation and suboptimal device performance, as conventional methods struggle to achieve desired node dimensions without exceeding this critical thickness.
Innovation Solution
A method involving the formation of a multilayered stack of alternating compressively strained Silicon Germanium (Si1-xGex) and tensily strained Carbon-doped Silicon (Si:C) layers, followed by annealing to remove Carbon and diffuse Germanium, resulting in a substantially continuous SiGe Fin with a height exceeding the critical thickness, thereby avoiding defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If the SiGe layer thickness is increased to achieve the minimum required Fin height for desired node dimensions, then the Fin height requirement is met, but defects are generated in the SiGe film
Solution Approach 1:
The SiGe Fin is segmented into a multilayered stack of alternating SiGe and Si:C layers during fabrication. Each layer is thinner than the critical thickness, avoiding defects. The individual layers are then merged through thermal annealing to form a continuous Fin structure with total height exceeding the critical thickness, thus achieving both height requirements and defect-free fabrication.
Solution Approach 2:
The Si:C layers are deposited with Carbon doping before the Fin formation process. This preliminary Carbon incorporation creates tensile strain that compensates for the compressive strain in SiGe layers, allowing each layer to be formed at a thickness below the critical threshold without generating defects, while the cumulative height still meets the Fin height requirement.
2Reliability
If the SiGe layer thickness is kept below the critical thickness to avoid defects, then the film remains defect-free, but the Fin height is insufficient to achieve desired node dimensions
Solution Approach 1:
Multiple thin SiGe and Si:C layers are combined vertically to form a multilayered stack. The cumulative height of these layers exceeds the critical thickness requirement for the Fin structure. During thermal annealing, the layers are merged into a substantially continuous Fin, achieving the required height while maintaining defect-free fabrication since no individual layer exceeded its critical thickness.
Solution Approach 2:
The Fin structure is formed as a composite of SiGe and Si:C materials. The Si:C layers provide tensile strain that balances the compressive strain in SiGe layers, enabling each component layer to remain below its critical thickness without defects. The composite structure achieves the required Fin height through the cumulative thickness of multiple layers.
3Length of stationary object
If alternating layers of SiGe and Si:C are formed and annealed to merge into a continuous Fin, then the critical thickness limitation is overcome, but the process complexity increases
Solution Approach 1:
The Si:C layers act as intermediaries during the fabrication process. They are deposited with Carbon doping to create tensile strain that balances the compressive strain in SiGe layers. During thermal annealing, the Carbon is removed and the Si:C layers serve as a medium through which Ge diffuses, ultimately merging the alternating layers into a continuous SiGe Fin. This intermediary approach enables overcoming the critical thickness limit while using standard epitaxial and annealing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the creation of defect-free SiGe Fins with heights greater than the critical thickness, enhancing device performance by increasing the critical thickness and maintaining structural integrity, thus overcoming the limitations of conventional SiGe Fin fabrication.
Implementation Method 1
annealing the Fin precursor structure to remove Carbon from the strained Si:C layers to form Carbon-depleted layers
Implementation Method 2
diffuse Germanium from the compressively strained Si1-xGex layers into the Carbon-depleted layers to produce a substantially continuous Si1-xGex Fin
Implementation Method 3
forming a multilayered stack on a surface of a supporting layer. The multilayered stack is comprised of alternating layers of compressively strained Silicon Germanium (Si1-xGex) and tensily strained Carbon-doped Silicon (Si:C)
Data Source
AI summary
A method includes forming a multilayered stack on a surface of a supporting layer. The multilayered stack is composed of alternating layers of compressively strained Silicon Germanium (Si1-xGex) and tensily strained Carbon-doped Silicon (Si:C). The method further includes etching the multilayered stack to form at least one Fin precursor structure and annealing the Fin precursor structure to remove Carbon from the strained Si:C layers to form Carbon-depleted layers and to diffuse Germanium from the Si1-xGex layers into the Carbon-depleted layers producing a Si1-xGex Fin. A structure that is disclosed includes a Semiconductor on Insulator (SOI) layer disposed on a layer of buried oxide and a multilayered stack on a surface of the SOI layer. The multilayered stack is composed of alternating layers of compressively strained Si1-xGexand tensily strained Si:C. The structure further includes a hardmask layer disposed on a top surface of the multilayered stack.