SiGe HBT Deep Pseudo Buried Layer for Low Series Resistance

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Solution Overview

Problem

The formation of buried layers in silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) using low-energy ion implantation is inadequate for high-voltage devices, limiting lateral connection and affecting device performance due to diffusion issues during annealing.

Innovation Solution

A method involving the formation of deep pseudo buried layers with laterally connected second pseudo buried layers, allowing higher energy ion implantation and annealing to reduce series resistance and saturation voltage drop, using trenches with a regular-trapezoidal cross section to prevent inner sidewall doping and facilitate complete dielectric filling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If low-energy ion implantation is used to form pseudo buried layers, then the manufacturing process is simpler, but the lateral connection is insufficient and series resistance is high

Engineering Contradiction:
Improveion implantation process simplicityVSAvoidlateral connection quality
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent divides the pseudo buried layer formation into two distinct layers: a first pseudo buried layer formed by low-energy ion implantation and a second pseudo buried layer formed by high-energy ion implantation. This segmentation allows each layer to serve different functions - the first layer provides initial doping while the second layer ensures deep lateral connection, thereby resolving the contradiction between process simplicity and connection quality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extends the pseudo buried layer structure into the depth dimension by forming a second pseudo buried layer deeper in the substrate than the first layer. This vertical dimensionality change enables high-energy ion implantation to achieve deep lateral connection without affecting the simpler first layer formation, thus improving manufacturing precision while maintaining ease of manufacture.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If trenches with inverted trapezoidal cross section are used, then dielectric filling is improved, but inner sidewall doping occurs during ion implantation

Engineering Contradiction:
Improvedielectric filling qualityVSAvoiddoping position control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent segments the ion implantation process into two distinct energy stages, allowing the inverted trapezoidal trench structure to be filled with dielectric material without suffering from sidewall doping. The low-energy first implantation respects the trench geometry, while the high-energy second implantation penetrates deeper to achieve lateral connection, thus maintaining both ease of manufacture and manufacturing precision.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from two-dimensional planar doping to three-dimensional deep doping by forming the second pseudo buried layer at greater depth. This dimensional change allows the inverted trapezoidal trench to maintain its dielectric filling advantage while the deep second layer achieves lateral connection without being constrained by the trench sidewall geometry, preserving doping position accuracy.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the current amplification coefficient of parasitic transistors, lowers series resistance, and decreases saturation voltage drop, improving the performance of SiGe HBTs while simplifying the manufacturing process.

Implementation Method 1

forming inner sidewalls in the trenches 12 and forming a pseudo buried layer 13 under the bottom of each trench 12 by using an ion implantation process

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

affecting device performance due to diffusion issues during annealing

Methodology Applied
Scientific EffectAnnealing: Annealing

Implementation Method 3

allowing higher energy ion implantation and annealing to reduce series resistance

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS8816400B2SiGe HBT having deep pseudo buried layer and manufacturing method thereof
Publication Date: 2014.08.26 SHANGHAI HUAHONG GRACE SEMICON MFG CORP
  • US8816400B2 patent drawing
  • US8816400B2 patent drawing
  • US8816400B2 patent drawing

AI summary

A silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) having a deep pseudo buried layer is disclosed. The SiGe HBT includes isolation structures formed in trenches, first pseudo buried layers and second pseudo buried layers, and a collector region. The first pseudo buried layers are formed under the respective trenches and the second pseudo buried layers are formed under the first pseudo buried layers, with each first pseudo buried layer vertically contacting with a second pseudo buried layer. The second pseudo buried layers are laterally connected to each other, and the collector region is surrounded by the trenches, the first pseudo buried layers and the second pseudo buried layers. The cross section of each of the trenches has a regular trapezoidal shape, namely, each trench's width of its top is smaller than that of its bottom. A manufacturing method of the SiGe HBT is also disclosed.