SiGe HBT Emitter Layers for Breakdown Voltage and Reliability

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Solution Overview

Problem

Conventional SiGe heterojunction bipolar transistors (HBTs) face challenges in reducing current gains and increasing breakdown voltages without compromising device speed and power requirements.

Innovation Solution

The method involves forming an emitter region with multiple emitter layers doped with germanium and diffusion modulating impurities like carbon, nitrogen, fluorine, or oxygen, which creates an oxide-free interface with the silicon cap layer, enhancing surface recombination and allowing for precise control of the base-emitter junction, thereby tuning device parameters such as collector current and breakdown voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an oxide interface is formed between the silicon cap layer and the polySiGe emitter layer, then the interface provides structural stability, but the oxide layer increases surface recombination and reduces device performance

Engineering Contradiction:

Improvedevice performanceVSAvoidsurface recombination

Core Design Contradiction:

ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent removes the oxide layer from the interface between the silicon cap layer and the polySiGe emitter layer. By eliminating this harmful oxide interface, surface recombination is reduced and device performance is improved without compromising structural stability

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent modifies the interface composition by changing the oxygen content parameter. Specifically, it reduces or eliminates the oxide layer at the silicon cap/polySiGe emitter interface, thereby changing the chemical composition and reducing surface recombination effects

Inventive Principle:

Principle #35Parameter changes

2Adaptability or versatility

If the emitter region is doped with conventional elements only, then the doping process is simple, but the device-tuning capability is limited

Engineering Contradiction:

Improvedevice-tuning capabilityVSAvoiddoping process complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent creates a composite emitter region by combining polySiGe material with specific dopants (arsenic and phosphorus) in controlled proportions. This composite structure provides enhanced device-tuning capability for controlling collector current and breakdown voltage while maintaining manageable process complexity

Inventive Principle:

Principle #40Composite materials

Solution Approach 2:

The patent applies different dopant concentrations and types at different locations within the emitter region. By locally optimizing the dopant composition in the polySiGe emitter, it achieves precise control over device parameters such as collector current and breakdown voltage

Inventive Principle:

Principle #3Local quality

3Stability of the object's composition

If the SiGe is grown pseudomorphically to match the silicon lattice, then the lattice mismatch is minimized, but the SiGe remains in a compressively strained state which limits performance optimization

Engineering Contradiction:

Improvelattice matchingVSAvoidperformance optimization

Core Design Contradiction:

Stability of the object's compositionVSAdaptability or versatility

Solution Approach 1:

The patent changes the strain state parameter of the SiGe by introducing a relaxed SiGe layer between the silicon cap layer and the substrate. This transitions the SiGe from a compressively strained pseudomorphic state to a relaxed state, enabling further performance optimization while maintaining adequate lattice matching

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach adds device-tuning capability to SiGe HBTs, reducing current gains and increasing breakdown voltages while maintaining high-frequency performance and reducing hot electron injection effects, with enhanced hole mobilities and surface recombination velocities.

Implementation Method 1

doping the first emitter layer with a pre-determined percentage of at least one element associated with the compound base region

Methodology Applied

Scientific EffectDopant diffusion: Diffusion

Implementation Method 2

enhancing surface recombination and allowing for precise control of the base-emitter junction

Methodology Applied

Scientific EffectSurface recombination:

Implementation Method 3

reducing hot electron injection effects, with enhanced hole mobilities and surface recombination velocities

Methodology Applied

Scientific EffectHot electron injection:

Implementation Method 4

enhanced hole mobilities and surface recombination velocities

Methodology Applied

Scientific EffectCarrier mobility:

Implementation Method 5

doping the first emitter layer with a diffusion modulating impurity

Methodology Applied

Scientific EffectDiffusion modulation: Diffusion Barrier

Data Source

PatentUS7651919B2Bandgap and recombination engineered emitter layers for SiGe HBT performance optimization

Publication Date: 2010.01.26 ATMEL CORP

AI summary

A method for fabricating a heterojunction bipolar transistor (HBT) is provided. The method includes providing a substrate including a collector region; forming a compound base region over the collector region; and forming an emitter region over the compound base region including forming a first emitter layer within the emitter region and doping the first emitter layer with a pre-determined percentage of at least one element associated with the compound base region. In one implementation, an emitter region is formed including multiple emitter layers to enhance a surface recombination surface area within the emitter region.