SiGe HBT Raised Base Using Germanium Etch Stop
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Solution Overview
Problem
Conventional raised-base SiGe heterojunction bipolar transistors (HBTs) face challenges in manufacturing due to high temperature processing and selective etching difficulties, which complicate the formation of single-crystal extrinsic base structures, increasing costs and complexity.
Innovation Solution
Incorporating thin, substantially pure Ge layer portions between Si extrinsic base structures and SiGe intrinsic base structures, formed as single-crystal structures, simplifies the fabrication process, reduces manufacturing costs, and avoids high temperature processing and etching issues, while maintaining superior operating characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional raised-base techniques using polysilicon are used, then extrinsic base region can be formed, but high temperature processing and selective etching difficulties occur
Solution Approach 1:
The patent changes the material parameter from polysilicon to germanium for the extrinsic base region. Germanium can be deposited at lower temperatures than polysilicon and etched with better selectivity, directly resolving the high temperature processing and etching difficulties while maintaining the raised base structure functionality
Solution Approach 2:
The patent uses a simpler germanium deposition process that can be integrated into existing fabrication lines without requiring complex high temperature equipment or multiple separate deposition steps, reducing manufacturing complexity and cost
2Manufacturing precision
If separate deposition steps are used for extrinsic base region, then single-crystal structure can be achieved, but manufacturing cost increases
Solution Approach 1:
The patent merges the germanium layer deposition with the existing base region formation process. The germanium is deposited as part of the base stack fabrication sequence, eliminating the need for separate deposition steps while maintaining single-crystal structure through controlled epitaxial growth
Solution Approach 2:
The germanium layer serves multiple functions: it forms the extrinsic base region, provides the raised base structure, and enables low temperature processing. This multi-functionality eliminates the need for additional dedicated deposition steps, reducing manufacturing cost while maintaining crystal quality
3Reliability
If polysilicon extrinsic base structures are used, then base resistance can be reduced, but selective etching difficulty increases
Solution Approach 1:
The patent replaces polysilicon with germanium, which has superior etchability. Germanium can be selectively etched using standard wet or vapor HF etchants with high selectivity, directly resolving the etching difficulty while maintaining the low resistance properties through appropriate doping
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The modified fabrication method allows for the production of SiGe HBTs with single-crystal extrinsic base structures, enhancing performance and reducing manufacturing costs by simplifying the process and avoiding complications associated with polysilicon-based extrinsic base structures.
Implementation Method 1
thin, substantially pure Ge layer portions disposed between Si extrinsic base structures and corresponding SiGe intrinsic base structure portions
Data Source
AI summary
A thin Ge layer is formed between an SiGe intrinsic base and single-crystal Si extrinsic base structures to greatly simplify the fabrication of raised-base SiGe heterojunction bipolar transistors (HBTs). The fabrication process includes sequentially depositing the SiGe intrinsic base, the Ge, and Si extrinsic base layers as single-crystal structures over a patterned silicon wafer while the wafer is maintained inside a reaction chamber. The Ge layer subsequently functions as an etch stop, and protects the crystallinity of the underlying SiGe intrinsic base material during subsequent dry etching of the Si extrinsic base layer, which is performed to generate an emitter window. A wet etch then removes residual Ge from the emitter window to expose a contact portion of the SiGe layer surface without damage. A polysilicon emitter structure is formed in the emitter window, and then salicide is formed over the base stacks to encapsulate the SiGe and Ge structures.