SiGe Channel Interface Charge Reduction via Si Passivation
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Solution Overview
Problem
Silicon germanium (SiGe) channel-based devices face a significant challenge with interface charge density (Dit) at the gate dielectric, which is more than an order of magnitude greater than in traditional silicon (Si) channels, affecting performance.
Innovation Solution
A method involving the formation of a thin continuous silicon (Si) layer on the SiGe channel material using a silicon-containing chemical precursor, followed by deposition of a gate dielectric, which passivates the interface and reduces Dit, and optional n-type doping to enhance performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a SiGe channel is used instead of traditional Si channel, then threshold voltage control, NBTI resistance, and hole mobility are improved, but interface charge density (Dit) at the gate dielectric increases significantly
Solution Approach 1:
A thin continuous Si layer is introduced as an intermediary between the SiGe channel and the gate dielectric. This intermediate Si layer passivates the SiGe surface, reducing interface charge density while maintaining the beneficial properties of the SiGe channel such as improved NBTI resistance and hole mobility.
Solution Approach 2:
The SiGe channel surface is pre-treated by forming a thin continuous Si layer before depositing the gate dielectric. This preliminary passivation action reduces interface charge density in advance, ensuring optimal interface quality and device performance from the beginning.
2Reliability
If interface charge density is reduced through surface treatment, then device performance is improved, but process complexity increases
Solution Approach 1:
The formation of the thin continuous Si layer is merged with the existing gate dielectric deposition process. By integrating the surface passivation step into the standard manufacturing flow, the process complexity is minimized while achieving significant reduction in interface charge density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach effectively reduces interface charge density to the 1×10^10 cm^2 range, improving the performance of SiGe channel-based devices by forming a pinhole-free Si layer and enhancing the SiGe/gate dielectric interface.
Implementation Method 1
contacting the SiGe channel material with a silicon (Si)-containing chemical precursor under conditions sufficient to form a thin continuous Si layer
Implementation Method 2
the thin continuous Si layer passivates an interface between the SiGe channel material and the gate dielectric thereby reducing the Dit
Implementation Method 3
contacting the SiGe channel material with an n-dopant precursor under conditions sufficient to chemically dope a surface of the SiGe channel material with an n-type dopant
Data Source
AI summary
Techniques for interface charge reduction to improve performance of SiGe channel devices are provided. In one aspect, a method for reducing interface charge density (Dit) for a SiGe channel material includes: contacting the SiGe channel material with an Si-containing chemical precursor under conditions sufficient to form a thin continuous Si layer, e.g., less than 5 monolayers thick on a surface of the SiGe channel material which is optionally contacted with an n-dopant precursor; and depositing a gate dielectric on the SiGe channel material over the thin continuous Si layer, wherein the thin continuous Si layer by itself or in conjunction with n-dopant precursor passivates an interface between the SiGe channel material and the gate dielectric thereby reducing the Dit. A FET device and method for formation thereof are also provided.