SiGe Interfacial Layer for Threading Dislocation Binding
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Solution Overview
Problem
The existing multilayer structures with SiGe layers suffer from high densities of threading dislocations and surface roughness, which hinder the production of high-quality electronic components due to stress fields and cross-hatch topography, despite previous strategies that only partially reduce threading dislocation densities.
Innovation Solution
A multilayer structure is developed with a thin interfacial Si1−yGe layer deposited on the SiGe layer to bind threading dislocations, reducing their surface density and pile-ups, and featuring a low surface roughness, achieved through a process involving a gaseous mixture of hydrogen, hydrogen halides, silicon, and germanium compounds in an epitaxy reactor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a relaxed SiGe layer is deposited on silicon substrate to enable strained silicon deposition, then the lattice mismatch is accommodated and strained silicon can be grown, but threading dislocations form and reach the surface, disrupting electronic component functioning
Solution Approach 1:
A thin interfacial SiGe layer is introduced between the relaxed SiGe layer and the strained silicon layer. This intermediary layer acts as a dislocation binding zone that captures threading dislocations before they can reach the surface of subsequent layers, thereby protecting electronic components while maintaining the lattice mismatch accommodation function
Solution Approach 2:
The SiGe layer structure is segmented into multiple functional zones: a lower relaxed SiGe layer for lattice mismatch accommodation, a thin interfacial SiGe layer for dislocation binding, and an upper strained silicon layer for electronic component fabrication. This segmentation allows each layer to perform its specific function independently
2Stability of the object's composition
If simple heat treatment is applied to relax the SiGe layer, then the strain in the SiGe layer is reduced, but threading dislocation density increases significantly
Solution Approach 1:
The thin interfacial SiGe layer serves as a mediator that decouples the strain relaxation process from threading dislocation generation. During heat treatment, this intermediary layer absorbs the strain relief through controlled dislocation formation at the interface, preventing the propagation of threading dislocations into the upper layers
3Manufacturing precision
If the surface roughness of the SiGe layer is reduced, then the cross-hatch topography is minimized, but the underlying dislocation structure remains problematic
Solution Approach 1:
The structure is segmented to separate surface quality control from bulk dislocation management. The thin interfacial SiGe layer is positioned at the interface where it can bind dislocations without affecting the surface morphology of upper layers, allowing independent optimization of both surface roughness and dislocation density
Solution Approach 2:
The interfacial SiGe layer acts as a mediator that isolates the surface layers from the dislocation-prone lower SiGe layer. This intermediary structure allows the upper layers to achieve low surface roughness and cross-hatch topography while the lower layer handles the dislocation binding function
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution significantly reduces threading dislocation density and surface roughness, achieving a threading dislocation density of at most 1.5 E+4/cm² and pile-up density of at most 1 cm²/cm², with a surface roughness of at most 2 Å rms, enhancing the quality of the multilayer structure for electronic components.
Implementation Method 1
a layer of silicon and germanium (SiGe layer) deposited heteroepitaxially thereon
Implementation Method 2
a process involving a gaseous mixture of hydrogen, hydrogen halides, silicon, and germanium compounds in an epitaxy reactor
Data Source
AI summary
A multilayer structure, comprises a substrate and a layer of silicon and germanium (SiGe layer) deposited heteroepitaxially thereon having the composition Si1-xGex and having a lattice constant which differs from the lattice constant of silicon, and a thin interfacial layer deposited on the SiGe layer and having the composition Si1-yGey, which thin interfacial layer binds threading dislocations, and at least one further layer deposited on the interfacial layer.