SiGe Layer Planar Gate FET Channel Resistance Reduction
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Solution Overview
Problem
Conventional semiconductor power field effect transistors (FETs) face challenges in reducing channel resistance and body region resistance, which limits their current capability and unclamped inductive switching (UIS) performance.
Innovation Solution
Incorporating a silicon-germanium (SiGe) layer in the body region of trench-gate FETs, strategically positioned to form PN junctions and extend into channel regions, reduces channel resistance and overall body region resistance without inducing leakage current or degrading breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional vertically conducting trench-gate power MOSFET structures are used, then the device can achieve basic transistor function, but the channel resistance and body region resistance remain high, limiting current capability and UIS performance
Solution Approach 1:
The patent changes the material composition parameter by introducing silicon-germanium (SiGe) alloy layers with varying germanium concentrations (e.g., 10-50% Ge) in the body region. This material parameter change reduces the resistivity of the body region and channel, thereby lowering channel resistance and improving current capability and UIS performance without sacrificing breakdown voltage.
Solution Approach 2:
The patent employs composite material structures by integrating SiGe alloy layers within the silicon-based body region. The composite structure combines the advantages of silicon (high breakdown voltage) with silicon-germanium (low resistivity), creating a multi-layer body region that simultaneously achieves low channel resistance and high breakdown voltage capability.
2Productivity
If techniques are applied to reduce channel resistance and body region resistance, then current capability improves, but leakage current may increase and breakdown voltage may degrade
Solution Approach 1:
The patent applies local quality by creating distinct regions within the body with different SiGe concentrations and properties. The body region contains SiGe layers with optimized germanium content positioned to reduce channel resistance, while other regions maintain higher purity silicon characteristics to preserve breakdown voltage and minimize leakage. This spatial variation in material quality allows simultaneous optimization of multiple competing parameters.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The integration of SiGe layers in the body regions of FETs effectively lowers channel resistance and improves switching performance, enhancing the UIS capability and transistor efficiency.
Implementation Method 1
The silicon-germanium layers extend into corresponding channel regions to thereby reduce the channel resistance
Data Source
AI summary
A vertically-conducting planar-gate field effect transistor includes a silicon region of a first conductivity type, a silicon-germanium layer extending over the silicon region, a gate electrode laterally extending over but being insulated from the silicon-germanium layer, a body region of the second conductivity type extending in the silicon-germanium layer and the silicon region, and source region of the first conductivity type extending in the silicon-germanium layer. The gate electrode laterally overlaps both the source and body regions such that a portion of the silicon germanium layer extending directly under the gate electrode between the source region and an outer boundary of the body region forms a channel region.