SiGe Channel Side Regions for Threshold Voltage Modulation

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Solution Overview

Problem

In integrated circuit devices, varying germanium concentration profiles within the device channel can increase fabrication costs and lead to defects such as erosion or agglomeration, resulting in lower yields and unacceptable performance metrics.

Innovation Solution

The integration of vertically-graded silicon germanium (SiGe) regions adjacent to the channel in integrated circuit devices, which allows for modulation of the threshold voltage while minimizing additional processing steps and protecting the channel from defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If germanium concentration is varied within the device channel to modulate threshold voltage, then Vth modulation is achieved, but fabrication cost and complexity increase

Engineering Contradiction:
ImproveVth modulation capabilityVSAvoidfabrication complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating regions with different germanium concentrations specifically at the sides of the channel rather than varying it throughout the entire channel. The channel itself maintains uniform germanium concentration, while germanium-rich regions are localized to the sides under the gate, providing Vth modulation with simpler fabrication.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the germanium distribution into distinct regions: a uniform germanium concentration in the channel and separate germanium-rich regions at the sides. This segmentation allows independent control of channel properties and threshold voltage modulation, simplifying the fabrication process compared to varying germanium throughout the channel.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If germanium concentration profiles are varied within the device channel, then Vth modulation is achieved, but defects such as erosion or agglomeration occur

Engineering Contradiction:
ImproveVth modulation capabilityVSAvoiddefect-free operation
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent localizes germanium-rich regions to the sides of the channel rather than creating gradients within the channel itself. This localized approach provides the necessary Vth modulation while avoiding the defects (erosion and agglomeration) that arise from varying germanium concentration profiles within the channel structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

By segmenting the germanium distribution into uniform channel regions and separate side regions, the patent eliminates the harmful gradients that cause defects. The channel maintains uniform composition for reliable operation, while side regions provide the necessary electrical modulation.

Inventive Principle:
Principle #1Segmentation

3Ease of manufacture

If vertically-graded SiGe regions are added adjacent to the channel, then Vth modulation is achieved without additional processing, but device structure becomes more complex

Engineering Contradiction:
Improvefabrication simplicityVSAvoidstructural complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent merges the Vth modulation function with the existing germanium doping process by forming germanium-rich regions at the sides of the channel during the same fabrication sequence. This integration achieves threshold voltage modulation without requiring additional processing steps, though it does increase structural complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP4407687A1IC device with vertically-graded silicon germanium region adjacent device channel and method for forming
Publication Date: 2024.07.31 GLOBALFOUNDRIES US INC
  • EP4407687A1 patent drawingFigure 1A
  • EP4407687A1 patent drawingFigure 1B
  • EP4407687A1 patent drawingFigure 1C

AI summary

An integrated circuit (IC) device is disclosed which includes a first transistor over a substrate. The first transistor includes a gate over the substrate and between a source region and a drain region. The transistor further includes a first region of vertically-graded silicon germanium ("SiGe") adjacent a first side of a channel under the gate, and a second region of vertically-graded SiGe adjacent a second side of the channel. The channel includes substantially uniformly-graded SiGe.