SiGe Stressor Doping Profile for PMOS Carrier Mobility
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing methods for applying compressive stress to PMOS devices using SiGe stressors result in variations in p-type impurity diffusion, leading to performance inconsistencies across MOS devices due to differences in p-type impurity concentrations in the channel region.
Innovation Solution
A method involving the formation of SiGe stressors with varying p-type impurity concentrations, where a lightly doped or un-doped SiGe region is introduced between overlying and underlying SiGe regions to reduce p-type impurity diffusion into the channel region, thereby minimizing performance variations by absorbing and reducing diffused impurities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If SiGe stressors are grown in source and drain regions to apply compressive stress to the channel region, then carrier mobility is improved, but p-type impurity diffusion varies leading to performance inconsistencies
Solution Approach 1:
The patent applies different doping concentrations to different regions of the SiGe stressor structure. The underlying SiGe region has a first p-type doping concentration, the intermediate region has a second p-type doping concentration (lower than the first), and the overlying SiGe region has a third p-type doping concentration (higher than the second). This local quality variation allows the intermediate region to act as a barrier to p-type impurity diffusion while maintaining compressive stress in the channel region, thus improving carrier mobility without sacrificing performance consistency.
Solution Approach 2:
The intermediate SiGe region with lower p-type doping concentration serves as an intermediary layer between the heavily doped underlying and overlying SiGe regions. This intermediate region acts as a diffusion barrier that prevents excessive p-type impurity diffusion into the channel region, thereby reducing performance variations while still allowing the overall SiGe stressor structure to provide the necessary compressive stress for improved carrier mobility.
2Stress or pressure
If p-type impurity concentration is increased in SiGe stressors to enhance stress effect, then compressive stress is improved, but impurity diffusion into channel region increases causing performance variations
Solution Approach 1:
The patent implements local quality by creating regions with different p-type doping concentrations within the SiGe stressor structure. The underlying and overlying SiGe regions have higher p-type doping concentrations to provide strong compressive stress, while the intermediate region has a lower p-type doping concentration to limit impurity diffusion into the channel. This spatial variation in doping quality allows simultaneous achievement of high compressive stress and controlled impurity diffusion.
Solution Approach 2:
The SiGe stressor is segmented into three distinct regions with different p-type doping concentrations: an underlying region, an intermediate region, and an overlying region. This segmentation allows each region to perform its specific function - the heavily doped regions provide compressive stress while the lightly doped intermediate region controls impurity diffusion - thereby resolving the contradiction between stress magnitude and diffusion control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces performance variations across PMOS devices by controlling p-type impurity diffusion, ensuring more consistent device performance by using SiGe regions with different doping concentrations to absorb and manage diffused impurities.
Implementation Method 1
reduces p-type impurity diffusion into the channel region
Implementation Method 2
absorbing and reducing diffused impurities
Implementation Method 3
epitaxially growing SiGe stressors in the recesses
Implementation Method 4
SiGe stressors apply a compressive stress to the channel region
Data Source
AI summary
A device includes a semiconductor substrate, a gate stack over the semiconductor substrate, and a stressor region having at least a portion in the semiconductor substrate and adjacent to the gate stack. The stressor region includes a first stressor region having a first p-type impurity concentration, a second stressor region over the first stressor region, wherein the second stressor region has a second p-type impurity concentration, and a third stressor region over the second stressor region. The third stressor region has a third p-type impurity concentration. The second p-type impurity concentration is lower than the first and the third p-type impurity concentrations.