SiGe Vertical LED Drain Current Reduction in Phase Change Memory
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Solution Overview
Problem
Conventional phase change memories face issues with high drain current and low current efficiency due to silicon-based PN junctions in vertical LEDs, which hinder high density and low energy consumption requirements, and often result in non-functional peripheral circuit regions.
Innovation Solution
The implementation of vertical LEDs with a P-type conductive region containing SiGe, which reduces drain current and enhances current efficiency, along with a method for fabricating phase change memory that includes forming a sacrificial dielectric layer, N-type and P-type conductive regions, and shallow trench isolation units to ensure proper functioning of the peripheral circuit region without affecting the phase change memory's performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If vertical LEDs with silicon-based PN junctions are used in phase change memory, then the device can be fabricated with conventional processes, but the drain current is high and current efficiency is low
Solution Approach 1:
The patent changes the material composition of the P-type conductive region from pure silicon to SiGe alloy, specifically controlling the germanium concentration (20%-60% molar ratio) to optimize the balance between ease of manufacture and drain current reduction. This parameter change allows the device to maintain fabricability while significantly reducing drain current and improving current efficiency.
Solution Approach 2:
The patent employs SiGe composite material in the P-type conductive region, combining silicon and germanium to create a material with superior electrical properties. This composite material approach reduces drain current while maintaining compatibility with conventional fabrication processes, directly addressing the technical contradiction between ease of manufacture and energy loss.
2Ease of manufacture
If vertical LEDs with silicon-based PN junctions are used, then fabrication can proceed with standard processes, but current efficiency remains low
Solution Approach 1:
By adjusting the germanium concentration parameter in the SiGe alloy (20%-60% molar ratio), the patent optimizes carrier mobility and recombination characteristics, thereby improving current efficiency without compromising fabrication compatibility. This parameter optimization enables high-current-efficiency vertical LEDs to be manufactured using standard processes.
Solution Approach 2:
The SiGe composite material in the P-type conductive region enhances carrier transport properties and reduces non-radiative recombination, leading to improved current efficiency. This material composition strategy maintains ease of manufacture while achieving high productivity in terms of light output per unit current.
3Ease of manufacture
If conventional fabrication methods are used, then manufacturing is simpler, but peripheral circuit regions do not function properly
Solution Approach 1:
The patent segments the substrate into distinct storage substrate and peripheral substrate regions, allowing different process conditions and material compositions to be applied to each region. This segmentation enables the storage region to use SiGe-based vertical LEDs for high efficiency while the peripheral region can accommodate standard circuitry, ensuring both regions function properly.
Solution Approach 2:
The patent applies local quality by using SiGe material specifically in the P-type conductive regions of the storage area vertical LEDs, while maintaining conventional materials in peripheral circuits. This localized material optimization improves storage region performance without compromising peripheral circuit functionality, resolving the contradiction between manufacturing simplicity and reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of SiGe in the P-type conductive region decreases drain current and increases current efficiency in vertical LEDs, allowing for high-density and low-power phase change memory operation with a functioning peripheral circuit region.
Implementation Method 1
By the virtue of the hetero junction barrier effect, the drain current is reduced, thereby increasing current efficiency
Implementation Method 2
When the phase change material is heated at the proximity of melted temperature for a short time and then is cooled rapidly, it may phase change from crystal phase to non-crystal phase
Implementation Method 3
when the phase change material is heated below the melted temperature for a long time and then is cooled slowly, it may phase change from non-crystal phase to crystal phase
Implementation Method 4
Heat is supplied for phase change of phase change material
Implementation Method 5
The phase change material under the non-crystal phase has higher resistance ratio than under the crystal phase
Data Source
AI summary
The invention provides a phase change memory and a method for forming the phase change memory. The phase change memory includes a storage region and a peripheral circuit region. The peripheral circuit region has a peripheral substrate, peripheral shallow trench isolation (STI) units in the peripheral substrate, and MOS transistors on the peripheral substrate and between the peripheral STI units. The storage region has a storage substrate, an N-type ion buried layer on the storage substrate, vertical LEDs on the on the N-type ion buried layer, storage shallow trench isolation (STI) units between the vertical LEDs, and phase change layers on the vertical LEDs and between the storage STI units. The storage STI units have thickness equal to thickness of the vertical LEDs. Each vertical LED comprises an N-type conductive region on the N-type ion buried layer, and a P-type conductive region on the N-type conductive region. The P-type conductive region contains SiGe. The peripheral STI units have thickness equal to thickness of the storage STI units. A top of P-type conductive region is flush with a top of the peripheral substrate. The P-type conductive region containing SiGe reduces drain current through the vertical LED and raises current efficiency of the vertical LED. The peripheral circuit region can work normally without adverse influence on performance of the phase change memory.