Sigma-Delta ADC Delay Mismatch Compensation via Timer Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In applications like AC motor control, sigma-delta ADCs often experience a delay mismatch between measurement channels due to differences in analog treatment and filtering, leading to reduced converter resolution and timing inaccuracies, especially when using different sensor types or lacking computational resources for numerical compensation.
Innovation Solution
A method and system that adjust the start times of measurement channels by introducing predefined delay periods, ensuring the difference between these delays matches the mismatch, allowing for compensation before result usage, utilizing timer structures and adjustable decimation counters to synchronize channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If different sensor types or analog treatment components are used in measurement channels, then measurement flexibility and functionality are improved, but delay mismatch between channels increases
Solution Approach 1:
The patent applies preliminary action by introducing delay periods before the measurement channels are activated. The first measurement channel is started after a first delay period, and the second measurement channel is started after a second delay period. This preliminary timing adjustment compensates for the inherent delay differences caused by using different sensor types or analog treatment components, ensuring that both channels are synchronized when taking measurements.
2Measurement precision
If numerical compensation methods are used to correct delay mismatch, then timing accuracy is improved, but computational requirements and system complexity increase
Solution Approach 1:
The patent replaces the numerical/computational compensation method with a hardware-based timing adjustment mechanism. Instead of using complex numerical processing to correct delay mismatches after conversion, the system uses programmable delay periods controlled by timer structures to synchronize the measurement channels before conversion occurs. This substitution reduces computational requirements while achieving the same timing accuracy goal.
3Measurement precision
If delay compensation mechanisms are added to synchronize measurement channels, then timing accuracy is improved, but device complexity increases
Solution Approach 1:
The patent achieves delay compensation using existing programmable timer structures and control logic that are commonly found in sigma-delta ADC systems. The same timer structures used for decimation counter control are leveraged to implement the delay period control, making the compensation mechanism multi-functional rather than adding dedicated complexity. The control logic integrates timing synchronization with the existing measurement control framework.
Data Source
AI summary
A method and a system for compensating a delay mismatch between a first measurement channel and a second measurement channel is disclosed. A method for compensating a delay mismatch between a first measurement channel and a second measurement channel includes providing a reference point for starting the first and second measurement channel, and starting the first measurement channel after expiration of a first delay period which begins at the reference point. The method further includes starting the second measurement channel after expiry of a second delay period which begins at the reference point, wherein a difference between a length of the first delay period and a length of the second delay period is substantially equal to the delay mismatch between the first measurement channel and the second measurement channel.