Sigma-Delta ADC Feedback Filter for Bandwidth and Accuracy
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Solution Overview
Problem
Sigma-delta analog to digital converters face challenges in achieving high bandwidth and accuracy due to bulky devices caused by fast comparators, which lead to errors from 1/f noise and offset, resulting in inefficient designs.
Innovation Solution
The proposed sigma-delta ADC incorporates a passive filter and a gain stage with a chopper circuit and dynamic element matching, allowing for a simpler feedback circuitry and independent optimization of the gain stage and comparator, enabling improved noise rejection and accuracy while reducing the dependency on comparator gain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a fast comparator is used to enable high bandwidth, then the bandwidth is improved, but the device becomes bulky which slows down the comparator
Solution Approach 1:
The invention divides the ADC into multiple parallel sub-ADCs, each handling a portion of the input signal range. This segmentation allows each comparator to operate with reduced complexity while maintaining overall high bandwidth through parallel processing of the divided signal paths.
Solution Approach 2:
The patent transitions from a single-comparator architecture to a multi-dimensional parallel architecture with multiple sub-ADCs processing signals simultaneously. This dimensional expansion from 1D sequential comparison to 2D parallel comparison enables high bandwidth without requiring oversized individual comparators.
2Measurement precision
If the comparator is made accurate by minimizing errors due to 1/f noise and offset, then measurement precision is improved, but the device becomes bulky which slows down the comparator
Solution Approach 1:
The invention implements feedback mechanisms within each sub-ADC stage to actively compensate for offset and 1/f noise errors. This feedback approach enables accurate measurement without requiring oversized comparators, as the error correction is achieved through control loops rather than increased device size.
Solution Approach 2:
The patent introduces intermediary correction circuits and calibration mechanisms that mediate between the comparator and the quantization process. These intermediaries handle noise and offset compensation, allowing the comparator itself to remain compact while maintaining high measurement precision.
3Measurement precision
If a bulky comparator is used to improve accuracy, then measurement precision is improved, but the bandwidth is reduced
Solution Approach 1:
By segmenting the high-precision comparison task across multiple parallel sub-ADCs, each handling a portion of the signal range, the invention achieves overall high accuracy without requiring any single comparator to be bulky. The parallel architecture maintains high bandwidth while distributing the precision requirement across multiple smaller units.
Solution Approach 2:
The patent merges multiple parallel sub-ADC outputs to achieve the final high-precision result. This combination of multiple accurate but compact comparator outputs produces the equivalent accuracy of a single bulky comparator while maintaining the bandwidth advantages of smaller, faster devices.
Data Source
AI summary
A sigma-delta ADC is described including a passive filter with an input coupled to the ADC input and a filter output. A gain stage has an input connected to the filter output. A quantiser has an input connected to the gain stage output and a quantiser output. The passive filter includes a first filter resistor between the filter input and the filter output and a filter capacitor having first terminal coupled to the filter output. A feedback resistor is coupled between the quantiser output and the filter output and receives a negative of the value of the output to provide negative feedback to the filter output. The gain stage has a capacitor and resistor in series, and a gain element connected to the gain stage input and an output connected to the gain stage output. One terminal of the gain stage capacitor is connected to the gain element output.