Sigma-Delta ADC Bitstream Correction for Inter-Symbol Interference
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Solution Overview
Problem
Sigma-delta modulators suffer from inter-symbol interference (ISI) that degrade the signal integrity and reduce the signal-to-noise ratio due to non-linearities in the feedback loop, leading to errors such as falling-edge, rising-edge, positive, and negative glitches, which cause intermodulation products that fold back noise into the signal band of interest.
Innovation Solution
An error correction system utilizing a machine learning engine, such as a neural network, modifies the output bitstream to compensate for ISI by applying weights and biases to correct these errors, incorporating PVT sensors to adapt to process variations, and filtering to remove unwanted frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If sigma-delta modulators use non-return-to-zero coding scheme, then the conversion efficiency is improved, but inter-symbol interference occurs causing signal degradation and errors
Solution Approach 1:
The patent detects inter-symbol interference errors (falling-edge, rising-edge, positive, negative glitches) and converts them into correction opportunities by generating compensation signals that cancel out the interference effects, thereby transforming the harmful ISI into a correctable distortion
Solution Approach 2:
The system implements feedback by detecting the output bitstream, identifying ISI-induced errors, generating correction signals based on the detected errors, and feeding these corrections back to compensate the original signal, creating a closed-loop error correction mechanism
2Measurement precision
If feedback loop is used in sigma-delta modulators, then the signal conversion accuracy is improved, but non-linearities in the feedback loop cause inter-symbol interference
Solution Approach 1:
The patent extracts the inter-symbol interference component from the feedback loop output by detecting specific error patterns (falling-edge, rising-edge, positive, negative glitches) and separates it for targeted compensation, removing the harmful effect from the final output
3Reliability
If error correction system is implemented, then the signal-to-noise ratio is improved, but the system complexity increases due to machine learning engine requirements
Solution Approach 1:
The patent introduces an intermediary error correction system that acts as a mediator between the sigma-delta modulator and the final output, using machine learning models to detect and correct ISI errors without requiring fundamental changes to the original modulator architecture
Data Source
AI summary
A device may include a sigma-delta analog-to-digital converter (ADC) configured to convert an analog input signal to a digital signal that is a digital approximation of the analog input signal. A bitstream modifier is configured to receive the digital signal, output a first signal that is based on the digital signal at a first output terminal and output a first difference signal at a second output terminal that includes a first difference value between a first value of the digital signal and a second value of the digital signal. The second value is immediately prior to the first value in the digital signal. An error correction system is configured to receive the first signal, receive the first difference signal, use the first signal and the first difference signal to determine a correction value, and modify the digital signal to generate a corrected digital signal by applying the correction value.