Sigma-Delta ADC Reference Scheme for Rail-to-Rail Linearity
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Solution Overview
Problem
Existing continuous-time, incremental sigma-delta ADCs lack rail-to-rail linearity, limiting their ability to accurately digitize wide-ranging analogue inputs without requiring costly linearity-correction processing.
Innovation Solution
A continuous-time sigma-delta ADC design featuring a resistor-capacitor integrator with a differential amplifier and a clocked comparator, where both amplifier and comparator reference inputs are maintained at a common voltage derived from the converter reference input, utilizing a voltage divider and resistor ratios to achieve near rail-to-rail linearity in a small chip area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a single capacitor is used in the integrator circuit, then the chip area is reduced, but the input voltage range and linearity are limited
Solution Approach 1:
The patent changes the reference voltage parameter dynamically by switching between different reference voltages (e.g., Vref/2 and Vref) based on the input signal level. This allows the integrator to handle a wider input voltage range while maintaining linearity, resolving the contradiction between limited chip area and wide input range adaptability
Solution Approach 2:
The patent introduces dynamic switching of the reference voltage applied to the integrator during operation. The reference voltage is adjusted based on the input signal characteristics, enabling the single-capacitor integrator to adapt to different input ranges and maintain rail-to-rail linearity without requiring multiple capacitors
2Adaptability or versatility
If multiple capacitors are used to expand the input range, then the linearity improves, but the chip area increases
Solution Approach 1:
Instead of changing the physical capacitor structure, the patent changes the electrical parameter (reference voltage) to achieve different operating ranges. By switching reference voltages, the same capacitor can serve multiple input range requirements, avoiding the need for multiple capacitors and the associated chip area increase
3Device complexity
If the amplifier and comparator use different reference voltages, then the circuit design is simpler, but the linearity over wide input range is poor
Solution Approach 1:
The patent implements a feedback mechanism where the comparator output feeds back to control the reference voltage applied to the integrator. This feedback loop ensures that the reference voltage is dynamically adjusted to maintain linearity across the full input range, resolving the contradiction between circuit simplicity and linearity precision
Solution Approach 2:
The patent makes the reference voltage dynamic rather than fixed. The reference voltage changes based on the operating conditions and input signal level, allowing the circuit to maintain high linearity across a wide input range while keeping the overall circuit design relatively simple
Data Source
AI summary
An integrated-circuit, continuous-time, sigma-delta analog-to-digital converter has a single-ended analog input, a converter reference input, and a ground connection. The converter has a resistor-capacitor integrator arranged to receive the single-ended analog input. The integrator comprises a differential amplifier. The converter also has a clocked comparator connected to an output from the integrator, and circuitry arranged so that reference inputs to the amplifier and to the comparator can be maintained at a common voltage derived from the converter reference input.