Column-Parallel Sigma-Delta ADC With Offset Control for Fat Zero Reduction
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Solution Overview
Problem
Conventional sigma-delta analog-to-digital converters in imaging devices face issues with noise impact on reset and pixel signal voltages during readout and sample and hold operations, leading to undesirable results such as 'fat zeros' due to voltage threshold variations across columns.
Innovation Solution
The introduction of a fourth circuit branch that provides a positive offset to the pixel signal, allowing for the reduction or elimination of 'fat zeros' by ensuring accurate subtraction of reset and pixel signal voltages, and the use of a regulation branch to adjust currents based on a reference voltage, thereby minimizing noise impact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a conventional sigma-delta analog-to-digital converter uses ratio-based output code calculation, then the conversion process is simplified, but noise contamination from reset and pixel signal voltages increases, leading to measurement errors
Solution Approach 1:
The converter is divided into multiple independent column-parallel conversion circuits, each handling a specific column of pixels. This segmentation allows independent noise subtraction for each column, improving measurement precision while maintaining manageable complexity through modular design
Solution Approach 2:
A regulation branch is introduced as an intermediary component that generates a regulated current based on a reference voltage. This intermediary current serves as a stable baseline for noise subtraction, eliminating common-mode noise without requiring complex calculation algorithms
2Ease of operation
If common-mode noise is present during readout and sample and hold operations, then the signal transmission is maintained, but the output code becomes inaccurate due to noise contamination
Solution Approach 1:
The common-mode noise present in both reset and pixel signals is converted from a harmful factor into a useful feature. By subtracting the reset signal from the pixel signal, the shared noise components cancel out, leaving only the actual pixel information. This noise subtraction technique transforms the problematic common-mode noise into a beneficial differential measurement
Solution Approach 2:
The converter uses feedback through a regulation branch that continuously monitors and adjusts the current based on a reference voltage. This feedback mechanism ensures that the conversion process maintains accuracy despite the presence of common-mode noise during readout operations
3Adaptability or versatility
If column-specific variations are present, then the pixel array coverage is complete, but conversion accuracy decreases due to offset variations across columns
Solution Approach 1:
The pixel array is segmented into multiple columns, each with its own dedicated conversion circuit. This per-column processing allows independent calibration and noise subtraction for each column, eliminating the impact of column-specific offset variations on overall measurement precision
Solution Approach 2:
Each column-parallel conversion circuit is designed with local regulation and noise subtraction capabilities tailored to its specific column characteristics. This local quality approach allows each column to be optimized independently, compensating for column-specific variations while maintaining complete array coverage
Data Source
AI summary
A sigma-delta modulation sensing circuit and an analog-to-digital converter for an imager that eliminate the erroneous conversion of non-zero analog voltages to zero digital voltages is provided. The sensing circuit includes an offset branch that allows input of an offset voltage that is at least as large as a negative channel-specific offset found in a pixel signal voltage. The sensing circuit also includes a regulation branch based on a reference voltage common across multiple columns of an imager. The regulation branch has an adjustable resistance that is modulated during the sensing operation, which creates an adjustment current that is applied during the sensing operation to a reset signal. The sensing circuit and analog-to-digital converter generate digital code based on the difference between the reset voltage and the summed offset and pixel signal voltage.


