Sigma-Delta ADC for In-Memory Vector-Matrix Multiplication Output
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing hardware technologies for artificial neural networks lack adequate energy efficiency and are bulky due to the high number of synapses required for high computational parallelism, while CMOS-implemented synapses are inefficient compared to biological networks.
Innovation Solution
Utilizing non-volatile memory arrays as synapses in artificial neural networks, allowing for continuous programming and individual tuning of memory cells, which perform in-situ multiplication and addition functions, eliminating the need for separate logic circuits and enhancing power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If digital supercomputers or specialized graphics processing unit clusters are used to achieve high computational parallelism, then computational capability is improved, but energy efficiency deteriorates and cost increases
Solution Approach 1:
The patent merges memory and computation functions into a single integrated structure. Non-volatile memory cells are configured to perform both data storage and analog multiplication operations, eliminating the need for separate logic circuits. This integration allows high computational parallelism to be achieved while maintaining low energy consumption, as the same physical structure handles both memory access and computation.
Solution Approach 2:
The patent replaces digital mechanical/combinatorial logic circuits with analog computation based on electrical conductance properties of memory cells. The conductance of each memory cell directly represents a weight value, and analog currents perform multiplication and addition operations naturally through Kirchhoff's laws, substituting complex digital logic with simpler analog physics-based computation.
2Use of energy by moving object
If CMOS analog circuits are used for artificial neural networks, then energy efficiency is improved compared to digital systems, but the synapses become bulky and device complexity increases
Solution Approach 1:
The patent makes non-volatile memory cells universal by enabling them to perform multiple functions: data storage, analog multiplication, and addition operations. A single memory cell structure serves as both a storage element and a computational element, eliminating the need for separate CMOS analog circuitry for each function. This multi-functionality reduces device complexity while maintaining the energy efficiency of analog computation.
Solution Approach 2:
The patent changes the operational parameters of non-volatile memory cells to enable analog computation. By programming the conductance values of memory cells to represent weight values and operating in an analog regime rather than digital read/write modes, the memory cells perform multiplication and addition naturally. This parameter change allows the same physical structure to achieve both compact size and analog computational capability.
3Device complexity
If non-volatile memory arrays are used as synapses, then device complexity is reduced by eliminating separate logic circuits, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies partial programming to achieve desired weight values. Instead of requiring precise single-step programming, the system uses multiple incremental programming steps that progressively adjust conductance values toward target weights. This partial action approach tolerates manufacturing variations by allowing post-fabrication tuning through repeated programming cycles, reducing the stringency of manufacturing precision requirements.
Solution Approach 2:
The patent implements feedback mechanisms for weight programming and verification. The system reads the actual conductance values of memory cells and compares them with target weight values, then applies corrective programming as needed. This feedback loop compensates for manufacturing variations and ensures accurate weight values are achieved, reducing the impact of manufacturing precision limitations on overall system performance.
Data Source
AI summary
In one example, a system comprises a vector-by-matrix multiplication array comprising an array of non-volatile memory cells arranged in rows and columns; and a sigma-delta analog-to-digital converter to receive a current from a column of the vector-by-matrix multiplication array and to generate a digital output in response to the current.