Variable-Resolution Sigma-Delta DAC Dithering for Idle Tone Suppression
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Solution Overview
Problem
Sigma-Delta digital-to-analog converters (DACs) produce unwanted idle tones due to the quantization process, which limit the spurious free dynamic range and signal-to-noise-and-distortion performance, and existing methods are insufficient for effectively removing these tones.
Innovation Solution
The implementation of a Sigma-Delta DAC with a multi-bit modulator and a random or pseudo-random sequence generator that introduces dithering by rounding digital inputs, de-correlating idle tones through the addition of a non-correlated, high-frequency error signal, which is filtered by the modulator loop, thereby attenuating or canceling them.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a Sigma-Delta modulator uses a fixed resolution quantizer, then the device complexity is low and ease of manufacture is high, but idle tones are produced that limit spurious free dynamic range and signal-to-noise-and-distortion performance
Solution Approach 1:
The patent applies dynamics by making the quantizer resolution variable rather than fixed. The quantizer resolution is dynamically adjusted based on the input signal characteristics, allowing the system to adapt to different signal conditions. This dynamic adjustment enables the system to maintain high spurious free dynamic range by optimizing the quantization process for each input condition, while avoiding the need for overly complex fixed-structure solutions.
Solution Approach 2:
The patent changes the resolution parameter of the quantizer dynamically. By varying the resolution parameter based on input signal properties, the system can optimize performance for different signal conditions. This parameter change approach allows the system to eliminate idle tones by adapting the quantization precision to match the signal requirements, thereby improving spurious free dynamic range without requiring fundamentally complex architectural changes.
2Reliability
If dithering is applied by introducing a random error signal, then idle tones are de-correlated and attenuated, but additional circuitry and complexity are introduced
Solution Approach 1:
The patent implements self-service by having the quantizer inherently generate the dithering effect through its natural quantization process. Rather than requiring an external dithering circuit to add random noise, the system utilizes the quantization operation itself to create the necessary statistical variation. This self-service approach achieves idle tone suppression by leveraging the existing quantization mechanism, thereby avoiding additional dedicated dithering circuitry and reducing overall system complexity.
3Reliability
If a multi-bit quantizer is used instead of a 1-bit quantizer, then the signal-to-noise ratio is improved, but the quantizer produces larger idle tones that are harder to filter
Solution Approach 1:
The patent applies dynamics by making the multi-bit quantizer's effective resolution variable. Instead of using a fixed multi-bit quantizer that produces consistent large idle tones, the system dynamically adjusts the resolution based on input signal characteristics. This dynamic approach allows the system to maintain the high signal-to-noise ratio benefits of multi-bit quantization while reducing idle tone amplitude by adapting the quantization precision to match signal requirements, making the idle tones less problematic and easier to manage.
Data Source
AI summary
A multi-bit (M-bit, M>1 ) Sigma-Delta digital-lo-analog converter (DAC) with a variable resolution multi-bit quantizer that has its digital value inputs that are truncated or rounded to a resolution that follows a random or pseudo-random sequence to provide automatic dynamic dithering for removing undesired idle tones in the analog output of the Sigma-Delta DAC. Random numbers N(n) between 1 and M are provided, and M-N(n) least significant bits in each M-bit digital value at the output of the quantizer are forced to zero with a digital trunealor or rounder. The random numbers N(n) may be provided by a random or pseudo-random sequence generator, e.g., Galois linear feedback shift register in combination with digital comparators and an adder.