Sigma-Delta Comparator Delay Compensation for Stable Feedback
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Solution Overview
Problem
Continuous-time delta-sigma modulators suffer from excess loop delay due to propagation delay through the comparator, leading to instability in the feedback loop.
Innovation Solution
The design of a comparator with specific transistor configurations and additional current DACs to compensate for the delay, including a pre-amplifier and additional feedback loops to stabilize the system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a comparator is used in a continuous-time delta-sigma modulator, then the modulator can perform analog-to-digital conversion, but propagation delay through the comparator causes excess loop delay and instability
Solution Approach 1:
The patent applies preliminary action by predicting the current comparator output based on previous outputs and using this prediction to generate the feedback signal before the actual comparator output is available. This anticipatory approach compensates for the propagation delay, allowing the feedback loop to operate as if it were using current values rather than delayed values, thereby maintaining loop stability.
2Reliability
If the comparator delay is reduced, then the feedback loop stability improves, but the comparator design becomes more complex
Solution Approach 1:
The patent introduces an intermediary prediction mechanism that generates predicted comparator outputs based on historical data. This intermediary element acts as a mediator between the actual comparator and the feedback loop, providing the necessary compensation without requiring fundamental changes to the comparator's core comparison function, thus balancing stability improvement with manageable complexity increase.
Solution Approach 2:
The patent employs feedback by using previous comparator outputs to predict current outputs. This feedback mechanism creates a closed-loop system where past performance information is continuously fed back to inform current operations, enabling the system to compensate for delays inherent in the comparator without requiring ultra-fast comparator design.
3Reliability
If additional components are added to compensate for delay, then the feedback loop stability improves, but the device complexity increases
Solution Approach 1:
The patent achieves multi-functionality by having the prediction mechanism serve multiple purposes: it compensates for comparator delay, provides continuous feedback signals, and maintains loop stability. By making a single component perform multiple functions, the patent reduces the need for separate dedicated components for each function, thereby limiting the overall increase in device complexity while still achieving the desired stability improvement.
Data Source
AI summary
A circuit includes a transconductance stage having first and second outputs. The circuit also includes a comparator having first and second inputs. The first input is coupled to the first output, and the second input is coupled to the second output. The comparator includes first through fifth transistors and a pair of cross-coupled transistors. The pair of cross-coupled transistors is coupled to the second current terminals of the first and second transistors. The second current terminal of the third transistor is coupled to the second current terminal of the first transistor, and the first current terminals of the first, second, and third transistors are coupled together. The second current terminals of the fourth and fifth transistors are coupled together and to the control input of the third transistor.


