Sigma-Delta Feedback Patterns for ISI Reduction Without Range Loss
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Solution Overview
Problem
Single-bit sigma-delta modulators suffer from intersymbol interference (ISI) due to mismatched transition times, which existing solutions attempt to address by forcing a constant frequency of signal edges, but this reduces the dynamic range, or by increasing the number of bits, which adds expense.
Innovation Solution
The use of multi-bit feedback patterns with a constant number of signal edges, selected by a control circuit, and an added analog signal that enables full dynamic range operation by reverting to conventional mode when the input signal is large.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a constant frequency of signal edges is forced in the feedback signal to suppress ISI, then intersymbol interference is reduced, but the dynamic range is limited
Solution Approach 1:
The feedback signal transitions from a static constant-frequency pattern to a dynamic multi-bit pattern where the number of edges varies with the input signal amplitude. The system adapts the feedback pattern based on the instantaneous error signal, allowing both ISI suppression for small signals and full dynamic range for large signals.
Solution Approach 2:
The invention changes the parameters of the feedback signal by using multi-bit patterns with different numbers of edges instead of a fixed single-bit pattern. The system varies the feedback pattern parameters (number of bits, number of edges, amplitude distribution) based on the input signal characteristics, enabling optimal performance across the full dynamic range.
2Reliability
If the number of bits in the noise shaping loop is increased to limit ISI effects, then intersymbol interference is reduced, but the device complexity and expense increase
Solution Approach 1:
The feedback signal is segmented into multiple bits within each feedback cycle, creating a multi-bit pattern. This segmentation allows the system to encode both the amplitude information and the edge transition information in a structured way, suppressing ISI without requiring a higher overall bit depth in the quantizer.
Solution Approach 2:
The invention adds a temporal dimension to the feedback signal by using multi-bit patterns over multiple clock cycles. Instead of increasing bit depth in the traditional sense, the system distributes information across time and multiple bits, achieving ISI suppression through the structured variation of edge transitions rather than through increased quantizer resolution.
Data Source
AI summary
Described herein is a method and apparatus for reducing ISI in a single-bit ΣΔ modulator without reducing the dynamic range of the modulator. In one embodiment, the signal fed back to the input of the modulator is not the single-bit outputs of a quantizer as in the prior art, but rather patterns of such outputs. The patterns are selected so that each pattern has the same number of transition edges and there is thus no mismatch of transition times. In one embodiment, the patterns are created by digital logic. In another embodiment, an analog signal is added to the error signal in the feedback loop which causes the quantizer to generate the patterns. When the amplitude of the input signal exceeds a certain level, the modulator reverts to the typical operation of a prior art modulator, thus preserving the full dynamic range of the modulator.


