Sigma-Delta Modulator Chopping Switching for Low Noise
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Solution Overview
Problem
Designers of sigma-delta modulators face challenges in achieving low noise and low offset continuous-time modulators while minimizing inter-symbol interference (ISI), which is often addressed by return-to-zero schemes that degrade frequency characteristics.
Innovation Solution
The implementation of a delta-sigma modulator with n-modulation stages, including a 1-bit quantizer, differential Gm integrators, and chopping switching mechanisms that alternate polarity at specific frequencies to eliminate parasitic effects and charge errors, allowing for accurate switching characteristics and reduced integration resistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If return-to-zero switching is implemented to minimize ISI, then inter-symbol interference is reduced, but frequency characteristics are degraded
Solution Approach 1:
The patent applies periodic chopping action at frequency fCHOP to alternately connect and disconnect the Gm integrator from the integration capacitor. This periodic switching eliminates the need for return-to-zero coding while maintaining low ISI through continuous-time operation, and simultaneously preserves frequency characteristics by avoiding the bandwidth limitations imposed by RZ switching schemes
2Measurement precision
If chopping switching is used to eliminate parasitic effects, then offset and noise are reduced, but device complexity increases
Solution Approach 1:
The patent merges the chopping switching mechanism directly into the feedback path of the Gm integrator, combining the offset cancellation function with the existing integration operation. This integration approach achieves low noise and low offset performance while minimizing additional circuit complexity by reusing existing circuit elements for multiple functions
3Reliability
If continuous-time operation is maintained without return-to-zero, then frequency characteristics are improved, but inter-symbol interference increases
Solution Approach 1:
The patent employs feedback through the Gm integrator that continuously monitors and corrects the integration capacitor voltage. This feedback mechanism suppresses ISI by actively compensating for interference effects in real-time, allowing continuous-time operation to maintain both good frequency characteristics and low ISI through dynamic error correction
Data Source
AI summary
Circuits and methods to achieve a low-noise and low offset continuous sigma-delta modulator used e.g. for battery management are disclosed. Continuous integration of input is enabled by special switching principle of three parallel integrators. Precharging of integrator output in so called pre-run mode minimizes integrator leakage and non-ideal effects by connecting a Gm in pre-run mode either to input voltage or to a reference voltage depending this Gm is being used in a following clock period. Parasitic effects due to switching at first integration capacitor are minimized by using buffer amplifiers tracking the voltage on integration capacitors.