Multibit Sigma-Delta Modulator Feedback for Comparator Offset Tolerance
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Solution Overview
Problem
Multibit sigma delta modulators face significant offset errors due to comparator offset voltages, which affect conversion quality and speed, and traditional methods to mitigate these errors either reduce speed, increase power consumption, or introduce noise.
Innovation Solution
The implementation of a multibit sigma delta modulator design using multiple single bit noise shaped modulators with local feedback loops and reference voltages, where each comparator is driven by a unique reference voltage, minimizing offset errors and allowing for higher clock rates and lower noise operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the device size of the comparator is increased to reduce offset error, then the offset error is reduced, but the maximum speed of operation of the comparator is reduced
Solution Approach 1:
The patent applies feedback by feeding back the digital output signal through a digital-to-analog converter (DAC) to the input of the quantizer. This feedback mechanism allows the system to correct offset errors dynamically without requiring larger comparator devices, thereby maintaining high operating speed while reducing offset error impact on conversion quality.
2Measurement precision
If wideband high gain blocks are added before comparators to suppress offset problem, then the offset error is reduced, but the power consumption is significantly increased
Solution Approach 1:
Instead of using power-hungry wideband high gain blocks, the patent employs a feedback loop with a DAC that converts digital output back to analog form. This approach suppresses offset errors through feedback correction rather than amplification, significantly reducing power consumption while maintaining measurement precision.
3Measurement precision
If wideband high gain blocks are used before comparators to suppress offset problem, then the offset error is reduced, but kickback noise is introduced to the stage before the comparator
Solution Approach 1:
The feedback approach using a DAC introduces no kickback noise to preceding stages because the correction is applied in the digital domain and converted back to analog only where needed. This eliminates the harmful kickback noise effect that plagues systems using wideband high gain blocks while still achieving offset error suppression.
4Measurement precision
If the comparator clock speed is reduced to reduce offset error, then the offset error is reduced, but the speed of operation of the modulator is reduced
Solution Approach 1:
The patent maintains high modulator operation speed by using feedback to correct offset errors rather than reducing clock speed. The feedback mechanism works effectively at high speeds, allowing the modulator to operate at maximum productivity while the feedback loop continuously corrects offset errors that would otherwise require slower operation.
Data Source
AI summary
A multibit sigma delta modulator for conveting an analog input signal (Vin) into a multibit digital output signal is disclosed. In one embodiment, the multibit sigma modulator includes a first analog filter for filtering the analog input error signal, a quantizer including multiple single bit noise shaped modulators for quantizing the filtered analog input error signal outputted by the first analog filter for generating a multibit digital output signal, and a first feedback arrangement with at least one digital-to-analog converter (DAC) coupled to the quantizer for supplying to the first analog filter at least one quantizer feedback signal based on the multibit digital output signal.