Sigma-Delta ADC Offset Calibration Without Extra Dither Circuits

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Solution Overview

Problem

Sigma-delta analog-to-digital converters face signal offset issues due to comparator deviations, leading to degraded signal-to-noise ratio and increased circuit complexity from conventional methods, which also generate idle tones.

Innovation Solution

A sigma-delta analog-to-digital converter design incorporating a subtractor, loop filter, signal comparing circuits, and an offset calibration control circuit that alternates between offset detection and signal comparison modes to calibrate comparator offsets, eliminating the need for additional dither signal circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If comparator offset calibration is performed continuously, then signal offset is reduced, but signal conversion efficiency deteriorates

Engineering Contradiction:
Improvesignal offset accuracyVSAvoidsignal conversion efficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent implements periodic offset calibration by alternating between calibration mode and signal conversion mode. The offset calibration is performed at specific intervals rather than continuously, allowing the system to maintain signal offset accuracy while preserving overall signal conversion efficiency through periodic rather than continuous calibration operations.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent dynamically switches between two operational modes: offset calibration mode and signal conversion mode. This dynamic mode switching allows the system to adapt its function based on operational requirements, performing calibration when needed and signal conversion at other times, thereby resolving the contradiction between maintaining precision and preserving productivity.

Inventive Principle:
Principle #15Dynamics

2Object-generated harmful factors

If dither signal generating circuit is added, then idle tones are suppressed, but circuit complexity increases

Engineering Contradiction:
Improveidle tonesVSAvoidcircuit complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent utilizes the existing offset calibration circuitry to generate a calibration signal that simultaneously serves dual purposes: calibrating the comparator offset and suppressing idle tones. This self-service approach eliminates the need for a separate dither signal generating circuit, as the calibration process itself provides the necessary signal to suppress idle tones, thereby reducing circuit complexity while maintaining effectiveness.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The calibration signal generated during offset calibration performs multiple functions: it calibrates the comparator offset and simultaneously acts as a dither signal to suppress idle tones. This multi-functionality allows a single circuit element to serve multiple purposes, eliminating the need for additional dedicated dither signal generating circuitry and thereby reducing overall circuit complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10998916B2Sigma-delta analog-to-digital converter capable of reducing idle tones while alternately conducting signal conversion and comparator offset calibration
Publication Date: 2021.05.04 REALTEK SEMICON CORP
  • US10998916B2 patent drawing
  • US10998916B2 patent drawing
  • US10998916B2 patent drawing

AI summary

A sigma-delta analog-to-digital converter includes: a subtractor for subtracting a feedback signal from an analog input signal; a loop filter for processing the output signal from the subtractor to generate a filtered signal; a signal comparing circuit for selectively operating in an offset detection mode or a signal comparison mode, wherein the signal comparing circuit generates an error signal irrelevant to the relative magnitude between the filtered signal and a reference signal in the offset detection mode, and generates a comparison signal corresponding to the relative magnitude between the filtered signal and the reference signal in the signal comparison mode; an offset calibration control circuit for calibrating the offset of the signal comparing circuit and for controlling the signal comparing circuit to alternately switch between the offset detection mode and the signal comparison mode; and a digital-to-analog converter for generating the feedback signal according to the comparison signal.