Sigma-Delta Modulator Output Rate Control for Lower Switch Loss
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Solution Overview
Problem
Conventional digital amplifiers using Pulse Width Modulation (PWM) generate high data output rates, leading to increased switch loss and electromagnetic interference (EMI), which is not effectively mitigated by existing sigma-delta modulators.
Innovation Solution
A sigma-delta modulator with an output rate reduction method that includes an integrator, analog-to-digital converter, and a controller to manage quantization error power, locking or unlocking the converter based on a predetermined power value to control the digital modulation signal and reduce switch loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If PWM is used for digital amplification, then EMI is generated, but switch loss is reduced
Solution Approach 1:
The patent changes the output data rate parameter dynamically. During high signal power conditions, the output data rate is reduced by locking the quantizer, which decreases switch loss while maintaining acceptable audio quality. During low signal power conditions, the normal high data rate is maintained to minimize EMI. This dynamic parameter adjustment resolves the contradiction between EMI suppression and switch loss reduction.
Solution Approach 2:
The system transitions from a static PWM approach to a dynamic sigma-delta modulation system where the quantizer can be locked or unlocked based on signal conditions. This dynamic behavior allows the system to adapt between two operational modes: normal mode (high data rate, low EMI) and power-saving mode (reduced data rate, low switch loss), effectively resolving the contradiction between EMI and switch loss.
2Object-affected harmful factors
If sigma-delta modulator operates at high data output rate, then EMI is minimized, but switch loss increases
Solution Approach 1:
The patent applies partial action by selectively reducing the output data rate only during specific conditions (high signal power) rather than maintaining constant high or low rates. The quantizer is locked partially (during high power segments) to reduce switch loss, while remaining unlocked during low power segments to minimize EMI. This selective application resolves the contradiction by applying the appropriate rate reduction only when necessary.
3Loss of energy
If output data rate is reduced, then switch loss is reduced, but quantization error power must be controlled
Solution Approach 1:
The patent implements feedback control where the controller monitors the signal power level and determines when to lock or unlock the quantizer accordingly. The feedback mechanism ensures that quantization error power is controlled by only reducing the output data rate when signal power is sufficiently high, preventing excessive quantization errors. This feedback-based decision-making resolves the contradiction between reducing switch loss and controlling quantization error power.
Data Source
AI summary
A sigma-delta modulator and an output rate reduction method are disclosed. The sigma-delta modulator comprises an integrator, an analog-to-digital converter, and a controller. An input signal is received by the integrator to generate an integrated signal. The integrated signal is then converted by the analog-to-digital converter into a digital modulation signal. The input signal is received by the controller to calculate an input signal power. The analog-to-digital converter can be controlled by the controller based on a predetermined power value and a sum of the input signal power and a total quantization error power. By the way mentioned above, the out rate of the sigma-delta modulator is reduced.