Sigma-Delta Modulator Truncation Shaping for Low-Resolution DACs
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Solution Overview
Problem
Sigma-delta modulators face challenges in achieving high signal-to-noise ratio (SNR) with large signal bandwidths due to the stability issues of higher order modulators, and the complexity of processing multi-bit signals in VLSI environments, particularly in reducing the resolution of the feedback digital-to-analog converter (DAC) while maintaining sufficient linearity and processing efficiency.
Innovation Solution
A sigma-delta modulator design with a feedback DAC of reduced resolution, incorporating a multiple order architecture that includes analog and digital adder circuits, integrator circuits, and truncation circuits to process and shape truncation errors effectively, using a noise transfer function greater than the order of the host modulator, thereby reducing the need for complex internal processing and increasing tolerance to non-ideal integrator characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a multi-bit quantizer is used to increase SNR, then the signal-to-noise ratio improves, but the device complexity and processing requirements increase significantly
Solution Approach 1:
The patent segments the quantizer output into multiple paths: a multi-bit quantized signal path and a truncated signal path. The truncated path processes only the most significant bits, reducing complexity, while the full multi-bit path maintains high SNR performance. This segmentation allows different processing complexities for different signal components.
Solution Approach 2:
The patent applies partial action by truncating the least significant bits of the quantizer output for the feedback path, rather than processing the full multi-bit signal. This partial processing reduces the complexity of the feedback DAC and downstream processing while maintaining sufficient accuracy for noise shaping purposes.
2Device complexity
If the resolution of the feedback DAC is reduced, then the device complexity decreases, but the linearity and processing accuracy deteriorate
Solution Approach 1:
The patent introduces a truncation circuit as an intermediary between the multi-bit quantizer and the reduced-resolution feedback DAC. This intermediary processes the quantizer output to generate appropriate feedback signals, bridging the gap between high-resolution quantization and low-resolution feedback while managing the linearity requirements.
Solution Approach 2:
The patent applies different resolution requirements to different parts of the signal processing chain. The quantizer operates at high resolution for accurate noise shaping, while the feedback DAC operates at lower resolution where full linearity is less critical. This local differentiation of quality requirements optimizes the overall system performance versus complexity trade-off.
3Measurement precision
If higher order modulators are used to achieve high SNR with large bandwidth, then the measurement precision improves, but the stability of the modulator deteriorates
Solution Approach 1:
The patent implements a dynamic architecture where the effective order of noise shaping can be adjusted. By combining a fixed-order modulator with dynamic truncation and digital filtering, the system achieves variable noise shaping characteristics, allowing high SNR performance without requiring a fixed high-order analog modulator structure that would be unstable.
Data Source
AI summary
A sigma-delta modulator is provided with a feedback digital-to-analog converter having less resolution than the quantizer, while providing a reduced length output word, requiring minimal additional internal processing, and shaping of the truncation error by an effective noise transfer function greater than the order of the host sigma-delta modulator, and further providing increased tolerance of non-ideal integrators.