Sigma-Shaped Groove Etching for Apex-Gate Height Control
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Solution Overview
Problem
The existing method for manufacturing sigma-shaped grooves in semiconductor integrated circuits results in a large apex-gate height, which negatively affects device performance, as the position of the apex cannot be well controlled during the TMAH wet etching process, leading to suboptimal etching rates on different crystal surfaces.
Innovation Solution
A method involving multiple etching steps, including a second etching that expands the opening width of the top sub-groove without changing the bottom sub-groove width or depth, and a third etching with varying etching rates on different crystal surfaces to shape the groove into a sigma-shape, reducing the apex-gate height by shifting the apex upwards.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional dry etching followed by TMAH wet etching is used to form sigma-shaped groove, then the groove morphology can be formed, but the apex-gate height becomes too large which reduces device performance
Solution Approach 1:
The etching process is divided into three distinct stages: first etching to form U-shaped groove, second etching to expand top opening width, and third etching to form the sigma shape with precise apex position. This segmentation allows independent control of each morphological feature, particularly enabling precise control of the apex-gate height by adjusting the third etching parameters without affecting the overall groove structure.
Solution Approach 2:
The patent applies different etching conditions to different regions of the groove. The second etching specifically targets the top opening area to expand its width, while the third etching acts on the sidewalls to create the sigma shape. This local differentiation allows the apex to be positioned at the optimal height for device performance while maintaining the required groove morphology.
2Shape
If TMAH wet etching is used to create sigma-shaped morphology, then the (111) crystal orientation etching resistance is utilized, but the apex position cannot be well controlled resulting in large apex-gate height
Solution Approach 1:
Before performing the third etching that forms the sigma shape, the second etching is conducted to pre-expand the top opening width of the groove. This preliminary action creates a wider opening that allows the subsequent third etching to form the sigma shape with the apex positioned at the desired height, as the etching front has more lateral space to work with, preventing the apex from being pushed too deep.
3Shape
If the apex-gate height is large, then the sigma-shaped groove morphology is achieved, but the acceleration effect of embedded germanium silicon epitaxial layer on device performance is reduced
Solution Approach 1:
The patent changes the etching parameters specifically in the third etching step to control the apex-gate height. By adjusting etching time, temperature, or chemical composition of the etching solution, the third etching can precisely control how deep the apex forms, optimizing it for maximum acceleration effect of the germanium silicon epitaxial layer while maintaining the sigma shape morphology.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the vertical spacing between the apex and the top surface, enhancing the carrier mobility and electrical performance of PMOS devices by precisely controlling the sigma-shaped groove morphology.
Implementation Method 1
The first etching is dry etching which makes the groove U-shaped
Implementation Method 2
The TMAH wet etching process mainly uses the principle of less etching on its (111) crystal orientation on the silicon substrate to obtain the sigma-shaped morphology
Implementation Method 3
The etching rates of TMAH on different crystal surfaces of the silicon substrate 101 are different. The etching rate on the (111) crystal surface is much smaller compared with the etching rate on the (110) crystal surface and (100) crystal surface
Implementation Method 4
the third etching adopts different etching rates on different crystal surfaces of the silicon silicon semiconductor substrate and expands the groove into a sigma-shaped cross section
Data Source
AI summary
A method for manufacturing a sigma-shaped groove in a semiconductor substrate includes: step 1: performing the first etching to form a U-shaped groove in a selected area of the substrate; step 2: performing a second etching configured to expand an opening width of the top sub-groove outward laterally, without changing an opening width of the bottom sub-groove and a depth of the groove; and step 3: performing the third etching which has different etching rates on different crystal surfaces of the semiconductor substrate to further expand the groove into a sigma-shaped groove with a sigma-shaped cross section. An increase of the opening width of the top sub-groove shifts the upper side surface towards an outer side of the sigma-shaped groove, resulting in an upward shift of the apex and reduces a vertical spacing between the apex and top surface of the semiconductor substrate, thereby improving the device performance.