Sigma Shaped Recess SiGe Epitaxy for Channel Stress
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Solution Overview
Problem
The short-channel effect is intensified when P-type impurities are in-situ doped at high concentrations during SiGe epitaxial growth in embedded SiGe processes, leading to increased source-drain series resistance and degraded semiconductor device performance.
Innovation Solution
A semiconductor device fabrication method involving the formation of a Sigma shaped recess, where a substantially un-doped SiGe layer is initially epitaxially grown, followed by the growth of P-type doped SiGe, with removable sidewalls protecting the surface and allowing in-situ doping to reduce series resistance and improve performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stress or pressure
If SiGe is epitaxially grown close to the channel to increase stress, then channel stress is enhanced, but high concentration P-type doping intensifies the short-channel effect
Solution Approach 1:
The first SiGe layer is positioned close to the channel to provide stress enhancement, but is kept substantially un-doped to avoid intensifying the short-channel effect. The P-type doping is applied locally to the second SiGe layer that is positioned away from the channel, thus achieving both stress enhancement and resistance reduction without the harmful interaction.
Solution Approach 2:
The stress-providing function is separated from the doping function: the first un-doped SiGe layer provides stress close to the channel, while the second P-type doped SiGe layer provides resistance reduction at a distance from the channel, eliminating the contradiction between these two functions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces source-drain series resistance and enhances semiconductor device performance by ensuring sufficient stress application and preventing high-resistance layer formation in the conductive channel.
Implementation Method 1
Forming removable sidewalls on side walls of the recess may include forming the removable sidewalls through chemical vapour deposition (CVD) and anisotropic etching process
Implementation Method 2
performing selective epitaxial growth of substantially un-doped SiGe in the Sigma shaped recess
Data Source
AI summary
A semiconductor device fabrication method is provided in which recesses are formed at source/drain positions in the substrate, removable sidewalls are formed on side walls of the recess, and the recesses then are etched to form Sigma shaped recesses. Selective epitaxial growth of substantially un-doped SiGe in the Sigma shaped recesses is performed, and the Sigma shaped recesses close to the surface of the substrate can be protected from epitaxial growth by the removable sidewalls. Epitaxial growth of SiGe doped with a P-type impurity can be performed in the Sigma shaped recesses after removing the sidewalls.