Electronic Signal Box Relay Logic Mapping for Easier Certification
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Solution Overview
Problem
Existing relay signal boxes for rail transport are costly to maintain and integrate with remote control and automation systems, and their replacement with electronic signal boxes involves high certification complexity due to software-based solutions, which are complex and prone to errors.
Innovation Solution
Mapping the switching logic of relay signal boxes onto functionally equivalent semiconductor circuits using configurable logic circuits, such as Field Programmable Gate Arrays (FPGAs), which provide a hardware-based solution that is less complex and less prone to errors, allowing for a direct replacement of relay circuits without significant changes to external installations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Extent of automation
If relay signal boxes are replaced with electronic signal boxes based on central computers and software, then modern technology and automation are achieved, but certification complexity and project costs increase significantly
Solution Approach 1:
The patent segments the electronic signal box system into modular components: a hardware module containing the configurable logic circuit, input units, and output units. This segmentation allows each module to be independently developed, tested, and certified, reducing overall certification complexity while maintaining automation benefits
Solution Approach 2:
The patent replaces the mechanical relay-based switching system with an electronic configurable logic circuit implemented in semiconductor technology. This substitution achieves modern automation while using verified hardware logic structures that simplify certification compared to software-based approaches
2Extent of automation
If relay signal boxes are replaced with electronic signal boxes using programmable processor cards, then electronic control is achieved, but the system inherits the same certification complexity as software-based solutions
Solution Approach 1:
The patent substitutes programmable processors with a configurable logic circuit implemented in semiconductor hardware. This replacement eliminates the certification issues associated with software execution and microprocessors while maintaining electronic control capabilities through hardware-based logic operations
Solution Approach 2:
The patent uses a configurable logic circuit where the logic function is defined by configuration parameters rather than executable software code. This parameter-based approach allows the same hardware structure to perform different logic functions without requiring software certification, reducing certification complexity while maintaining electronic control
3Device complexity
If configurable logic circuits are used instead of software-based electronic signal boxes, then certification complexity is reduced, but implementation complexity in hardware description languages is required
Solution Approach 1:
The patent replaces software implementation with hardware implementation using configurable logic circuits. While this requires hardware description languages for configuration, it eliminates the need for complex software development, compilation, and software certification processes, ultimately simplifying the overall implementation and manufacturing process
Solution Approach 2:
The patent enables logic function changes through configuration parameters of the configurable logic circuit rather than software code changes. This allows flexible logic implementation through hardware configuration, which simplifies the manufacturing process by eliminating software development cycles while maintaining adaptability
Data Source
AI summary
According to one aspect of the invention, the circuit logic of an existing relay interlocking system is mapped onto a functionally equivalent circuit of electronic components. Semiconductor components that are functionally identical to the components of the relay circuit are thus preferably used. The circuit logic is created, for example, by transforming an interlocking table or track diagram into a logic circuit by means of an automatic compiler according to predefined rules.